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'DRAM again'
1998\11\10@064346 by Gavin Jackson

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Hi there

I asked the stupid question earlier about the pinout
for a 30pin SIMM without having a look on the net
first. Talk about lazy!

I found the pinouts and have discovered that the SIMM
has three chips and therefore has parity. The problem
I have now is: the chip number is GM71C4256AJ80
which would suggest 256K. I traced out the PCB and
found that there are 9 address lines going to the three
chips, but only four data bits for the two main chips.

With 9 address lines I can address up to 512, but
with only 4 bits per chip!

Now does each chip hold 512 x 4bits or 256 x 4bits?

Regards

Gavin
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1998\11\10@082803 by keithh

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Gavin -

The TI series of DRAM chips wer numbered thus:
4164  = 1 bit x 64K     4416 = 4 bit x 16K
41256 = 1 bit x 256K    4464 = 4 bit x 64K
and many manufacturers follow a similar scheme.

I'm fairly certain the chips are 4 bit x 256K.

> With 9 address lines I can address up to 512, but
> with only 4 bits per chip!

False!
Each address line gets used twice: once on /RAS, once on /CAS.
Thus:
8  address lines (A0-7)=  256x256 = 64K locations.
9  address lines (A0-8)=  512x512 = 256K locations.
10 address lines (A0-9)= 1024x1024= 1M locations.

Sometimes PCBs are laid out with extra address lines so
they can be populated with various chips.
Saves making and stocking two PCBs.

1998\11\10@150545 by Lee Jones

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> I found the pinouts and have discovered that the SIMM
> has three chips and therefore has parity. The problem
> I have now is: the chip number is GM71C4256AJ80
> which would suggest 256K. I traced out the PCB and
> found that there are 9 address lines going to the three
> chips, but only four data bits for the two main chips.

Originally, at the 256Kbit technology level, a 256K x 9bit
SIMM would have been 9 identical 256K x 1bit DRAM chips.

As memory technology advanced, 1Mbit technology became cost
effective.  So the memory vendors made 1Mbit parts in both
1M x 1bit and 256K x 4bit versions.  And leading edge SIMMs
now had 9 chips forming 1M x 9bits.

But at the low end, there was still a demand for 256K x 9bit
SIMMs.  So the x 4bit parts allowed SIMM vendors (sometimes
a different division of the same company) to build SIMMs cheaper
using only 3 chips.  Two of the DRAMs will be 1Mbit technology
organized as 256K x 4bits and the third will be a 256Kbit part
organized as 256K x 1bit.

Only downside is that having 2 different size DRAMs on the same
PC board (i.e. SIMM) can make the memory controller design more
"interesting".

DRAM density keeps progressing but some tasks don't need ever
more memory.  So the memory vendors now offer the leading edge
parts in x1bit, x4bit, x8bit, and x16bit organizations.


> With 9 address lines I can address up to 512, but
> with only 4 bits per chip!

As someone else replied, there are 512 rows x 512 columns for
256K unique locations on that SIMM.
                                               Lee Jones

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