Post by thread:Compare mode interupt, '72

Just curious if any programmers can tell me if my ISR is LEGAL! Thank you, in advance, to anyone that has comments. ; If interrupts are desired, first uncomment next 2 lines... jmp startclr ; Jump around interrupt handler at 4 org 4 ; Interrupt code starts here ; ...then install interrupt handler starting here. ISR ;SaveContext ;PICBasic compiler has I0,I1,I2 available for interupt handling. movwf i0 ; i0 = stored W Register swapf status,0 ; put status into W, storing last bank bcf rp0 ; force bank zero movwf i1 ; i1 =the whole status register movf fsr,0 ; movwf i2 ; i2 =the whole fsr register ;actual ISR meat: btfss ccp1if,1 ;bit-test for compare interupt,1=set jmp restorec ;return if ccp1if is clear!!! ,else ;Toggle Routine: btfss _pinstate,1 ;test a.k.a.pinstate, skip next if HIGH jmp SetHigh ;set RC2 High ;SetLow clrb portb.0 ;else Set pin LOW bcf _pinstate ;Clear pinstate flag jmp jobdone SetHigh setb portb.0 ;Set High bsf _pinstate ;set pinstate flag jobdone bcf ccp1if ;Clear interupt flag bit clrf tmr1l ;Clear the TIMER1 register clrf tmr1h restorec ;restore context ; i0 = stored W Register ; i1 = the whole status register ; i2 = the whole fsr register movf i2,0 ;i2 into 0=W register movwf fsr ; W into fsr swapf i1,0 ;i1 into 0=W register movwf status ; W is now status, back to original bank swapf i0,1 ; swapf i0,0 ; i0 = was the previously stored W Register,continue onward reti

On Wed, 29 Oct 1997 00:50:32 -0500 Dave Celsnak <spam_OUTx93celsnakTakeThisOuTWMICH.EDU> writes: >Just curious if any programmers can tell me if my ISR is LEGAL! Do you mean you'll get sued (and lose) for using it? I doubt it, but I'm not a lawyer. It does appear that it will work. If you're trying to get exact timing, the clear of timer1 is a variable time after the interrupt. This will cause inexact timing. If you go to a chip with more than 2K of program space, and use the extra space, you'll have to consider the possibility of interrupts occurring while bits 3,4, or 5 of PCLATH are set. If that happens, the gotos in the ISR will go to the wrong page and the PIC will crash.

On Wed, 29 Oct 1997, Mike Keitz wrote: > On Wed, 29 Oct 1997 00:50:32 -0500 Dave Celsnak <.....x93celsnakKILLspam@spam@WMICH.EDU> > writes: > >Just curious if any programmers can tell me if my ISR is LEGAL! > > Do you mean you'll get sued (and lose) for using it? I doubt it, but I'm > not a lawyer. Just asking if it Legal, in the programming sense! > It does appear that it will work. If you're trying to get > exact timing, the clear of timer1 is a variable time after the interrupt. > This will cause inexact timing. Where do you recommend to clear the timer1 variable? Right after I check for my compare interupt flag? > > If you go to a chip with more than 2K of program space, and use the extra > space, you'll have to consider the possibility of interrupts occurring > while bits 3,4, or 5 of PCLATH are set. If that happens, the gotos in > the ISR will go to the wrong page and the PIC will crash. > Just sticking with the 2K PIC 16c72 for now. Do I have to save FSR, or any other registers??? Thanks, Dave

Hi, Here is my interrupt routine, and it has not suprised me yet. (Indeed, I have not tested it in ALL the cases.) interrupt: ; save status movwf W_TEMP ; save W (in bank 0 or 1) swapf STATUS,W ; swapped status into W bcf STATUS,RP0 ; switch to bank zero movwf STATUS_TEMP ; save STATUS swapf FSR,W ; swapped FSR into W movwf FSR_TEMP ; save FSR swapf PCLATH,W ; swapped PCLATH into W movwf PCLATH_TEMP ; save PCLATH clrf PCLATH ; unconditionally in lowest page ; CCP1 interrupt handling bcf PIR1,CCP1IF ; clear CCP1IF flag bcf T1CON,TMR1ON ; stop TIMER1 movlw HIGH ((moment0-interrupt)+3) movwf TMR1H movlw LOW ((moment0-interrupt)+3) movwf TMR1L bsf T1CON,TMR1ON ; run TIMER1 again moment0: ; some code (update LED par ex.) call nextLED ; restore CPU irr: bcf STATUS,RP0 ; goto page 0 swapf PCLATH_TEMP,W ; get swapped PCLATH into W movwf PCLATH ; restore PCLATH swapf FSR_TEMP,W ; get swapped FSR into W movwf FSR ; restore FSR swapf STATUS_TEMP,0 ; get swapped STATUS into W movwf STATUS ; restore STATUS (and reg. bank) swapf W_TEMP,F ; swap W_TEMP swapf W_TEMP,W ; swap W_TEMP into W (from anywhere save d) retfie Ivan Cenov okto7KILLspambotev.ttm.bg ---------- {Quote hidden}> From: Mike Keitz <.....mkeitzKILLspam.....JUNO.COM> > To: EraseMEPICLISTspam_OUTTakeThisOuTMITVMA.MIT.EDU > Subject: Re: Compare mode interupt, '72 > Date: 29 oKTOMWRI 1997 G. 18:02 > > On Wed, 29 Oct 1997 00:50:32 -0500 Dave Celsnak <x93celsnakspam_OUTWMICH.EDU> > writes: > >Just curious if any programmers can tell me if my ISR is LEGAL! > > Do you mean you'll get sued (and lose) for using it? I doubt it, but I'm > not a lawyer. It does appear that it will work. If you're trying to get > exact timing, the clear of timer1 is a variable time after the interrupt. > This will cause inexact timing. > > If you go to a chip with more than 2K of program space, and use the extra > space, you'll have to consider the possibility of interrupts occurring > while bits 3,4, or 5 of PCLATH are set. If that happens, the gotos in > the ISR will go to the wrong page and the PIC will crash.