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'CLRW instruction side effects?'
1998\08\27@095220 by Chip Weller

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Hi everyone:

I am using the PORTB interrupt on change. While using this feature any
read of PORTB can cancel the change condition. Also any
read/modify/write cycle will do the same. Since each write to a memory
location is implemented as a read/modify/write cycle, even if it is just
a write, in fact any access to PORTB can cancel the change condition.
(The RBIF bit is sticky, so this often is not a real problem except when
a new change is occurring.)

This brings up my question about the CLRW instruction. This instruction
appears to be implemented using a "CLRF X,W" encoding where X is a don't
care, but is always encoded as a 0 on all assemblers I have used. So if
FSR is set to PORTB then will CLRW clear the new RBIF set condition?

The same issues could exist in different devices with FSR set to SSPBUF,
RCREG and PORTD in PSP mode. Has anyone noticed this, is CLRW really
this dangerous?

Chip Weller.

1998\08\27@105056 by Dmitry Kiryashov

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Chip Weller wrote:

> This brings up my question about the CLRW instruction. This instruction
> appears to be implemented using a "CLRF X,W" encoding where X is a don't
> care, but is always encoded as a 0 on all assemblers I have used. So if
> FSR is set to PORTB then will CLRW clear the new RBIF set condition?

I join with Chip question. What real code CLRW instruction compiled to ?

WBR Dmitry.

1998\08\27@192250 by Tony Nixon

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Chip Weller wrote:
> This brings up my question about the CLRW instruction. This instruction
> appears to be implemented using a "CLRF X,W" encoding where X is a don't
> care, but is always encoded as a 0 on all assemblers I have used. So if
> FSR is set to PORTB then will CLRW clear the new RBIF set condition?

Surely this is a total nonsense, since the instruction decoder totally
ignores the xxx xxxx value of the instruction and just clears the W
register, sets the Z flag in Status and moves on.

--
Best regards

Tony

Multimedia 16F84 Beginners PIC Tools.
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1998\08\28@014803 by Clyde Smith-Stubbs

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On Fri, Aug 28, 1998 at 09:05:45AM +1000, Tony Nixon wrote:
> Surely this is a total nonsense, since the instruction decoder totally
> ignores the xxx xxxx value of the instruction and just clears the W
> register, sets the Z flag in Status and moves on.

Unfortunately not in all PICMicro devices. This may well be true
in newer designs, but is definitely not in older ones. The clrf xx,w
instruction will result in a read cycle to the referenced address, which
can have side effects. Of course you could just use movlw 0.


Cheers, Clyde

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Clyde Smith-Stubbs               |            HI-TECH Software
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1998\08\28@023553 by Mike Keitz

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On Thu, 27 Aug 1998 09:38:24 -0400 Chip Weller <.....chip_wellerKILLspamspam.....FITCH.COM>
writes:

>The same issues could exist in different devices with FSR set to
>SSPBUF,
>RCREG and PORTD in PSP mode. Has anyone noticed this, is CLRW really
>this dangerous?
>

Microchip recognized this potential problem and formally defined CLRW as
       clrf    3,w
so it does a read of the STATUS register, not the INDF register.  It
should be always safe to read the status register.  New versions of the
assembler should generate the register 3 code.  (Note that the assembler
will not assemble the line above, it will not take a destination field
for the clrf instruction.)

Really there's no need for the CLRW instruction since "movlw 0" or "andlw
0" would take the same space and time.  The latter will also set the Z
flag just like clrw does.


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