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PICList Thread
'Add and Instruction Cycles'
1998\07\23@060717 by Nuno Pedrosa

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Hi!

First, let me thank all the people that answered my questions about
fuel measurement, radio, etc. I know I haven't replied to all, but it's
kind of hard to keep up with all the messages flowing.

Now, my question:
While trying to count the bits on a byte, I stumbled into this:
 GOTO is a 2 cycle instruction.
 ADDWF is 1 cycle
I think the difference is on the instruction pipeline behaviour, right?

However, if you do ADDWF PC, what happens to the pipeline? Does ADDWF
take 2 cycles in this situation? If not, why not?

Thanx,
Nuno.
--
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   `-' "Try and leave this world a little better than you found it..."

1998\07\23@100028 by myke predko

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Nuno asked:
>While trying to count the bits on a byte, I stumbled into this:
>  GOTO is a 2 cycle instruction.
>  ADDWF is 1 cycle
>I think the difference is on the instruction pipeline behaviour, right?
>
>However, if you do ADDWF PC, what happens to the pipeline? Does ADDWF
>take 2 cycles in this situation? If not, why not?

ADDWF PCL, F (the actual format of the instruction that I think you want to
do) does execute in 2 cycles, just as you expected.

myke

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1998\07\23@122320 by Peter L. Peres

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On Thu, 23 Jul 1998, Nuno Pedrosa wrote:

> Hi!
>
> First, let me thank all the people that answered my questions about
> fuel measurement, radio, etc. I know I haven't replied to all, but it's
> kind of hard to keep up with all the messages flowing.
>
> Now, my question:
> While trying to count the bits on a byte, I stumbled into this:
>   GOTO is a 2 cycle instruction.
>   ADDWF is 1 cycle
> I think the difference is on the instruction pipeline behaviour, right?
>
> However, if you do ADDWF PC, what happens to the pipeline? Does ADDWF
> take 2 cycles in this situation? If not, why not?

It takes two, it's a special case, and this is one of those things when
you're told to believe and not to enquire.

Peter

1998\07\23@175629 by Sean Breheny

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Hi Nuno,

I don't think that any PICs support the instruction ADDWF PC. The
instruction you are thinking of is either ADDWF PCL or ADDWF PCLAH (if I
remember the
register name correctly), which  takes only 1 cycle and DOES NOT DIRECTLY
modify the PC. What happens is this: When you do a ADDWF PCLAH, the value
of W is added to PCLAH, the holding register for modifying the PC. Then,
upon the next goto or call, the goto (or call) address is loaded into the
PC and THEN the value in PCLAH is loaded into the PC (It doesn't modify
all of the bits of the PC). So, when the goto is executed, it takes two
cycles.

I know this could be alot clearer, but I can't remember the exact
register name for PCLAH or which bits of the PC it modifies.

Take a look at the table read example in any PIC datasheet.

Good luck,

Sean

On Thu, 23 Jul 1998, Nuno Pedrosa wrote:

{Quote hidden}

1998\07\23@191052 by paulb

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Sean Breheny wrote:

> I don't think that any PICs support the instruction ADDWF PC. The
> instruction you are thinking of is either ADDWF PCL or ADDWF PCLAH
> (if I remember the register name correctly), which  takes only 1 cycle
> and DOES NOT DIRECTLY modify the PC.

 He meant ADDWF PCL.  Any instruction involving PCL including such
oddities as BSET PCL,4 (conditional skip 16 instructions!) clear the
pipeline *exactly* as a GOTO or CALL does, therefore taking two cycles.

 The word is, it is not an "exception", it is a single *mechanism* in
the piplining system.

> I know this could be alot clearer, but I can't remember the exact
> register name for PCLAH or which bits of the PC it modifies.

 It varies!
--
 Cheers,
       Paul B.

1998\07\27@133711 by Caisson

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> Van: Nuno Pedrosa <nuno.pedrosaspamKILLspamOEN.SIEMENS.DE>
> Aan: .....PICLISTKILLspamspam.....MITVMA.MIT.EDU
> Onderwerp: Add and Instruction Cycles
> Datum: donderdag 23 juli 1998 12:56
>
> Hi!

[Cut]

> Now, my question:
> While trying to count the bits on a byte, I stumbled into this:
>   GOTO is a 2 cycle instruction.
>   ADDWF is 1 cycle
> I think the difference is on the instruction pipeline behaviour, right?
>
> However, if you do ADDWF PC, what happens to the pipeline? Does ADDWF
> take 2 cycles in this situation? If not, why not?

The ADDWF allways takes one cycle.  The problem is that a write to PCL
clears the Pipe-line.  This results executing a NOP as the next
instruction, because it has to load it's Pipe again.  This effect is equal
to what the GOTO experiences (it too changes the PCL :-).

In the above situation the instruction after the ADDWF will be executed 2
cycles after the ADDWF, and not 1 as expected.  But as explained above,
this has nothing to do with the ADDWF instruction, but everything with
writing to PCL (Yes, a GOTO to the next adress still takes 2 cycles).

Greetz,
 Rudy Wieser

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