Post by thread:AVR, PIC or ...

Stef Mientki wrote: > I just received the engineering review from Maxim. > If I only take a look at the pictures, > we should immediately stop using PICs and AVRs and go for Maxim. > Judge yourself: > http://pdfserv.maxim-ic.com/en/ej/MER_3.pdf Hi Stef, Will make interesting reading. The PIC18 architecture has been out since 1999 -- I wish Maxim used it for comparison instead of the midrange PICs. Regards, Ken Pergola -- http://www.piclist.com hint: To leave the PICList .....piclist-unsubscribe-requestKILLspam@spam@mitvma.mit.edu

On Wed, 25 Feb 2004 16:55:14 -0500, Ken Pergola wrote: > Stef Mientki wrote: > > > I just received the engineering review from Maxim. > > If I only take a look at the pictures, > > we should immediately stop using PICs and AVRs and go for Maxim. > > Judge yourself: > > http://pdfserv.maxim-ic.com/en/ej/MER_3.pdf > > Hi Stef, > > Will make interesting reading. > > The PIC18 architecture has been out since 1999 -- I wish Maxim used it for > comparison instead of the midrange PICs. I'm glad they included the MSP430 family also, I've been using a lot of them lately. After reading quickly through the article, it's obvious some sales geek wrote it. Lots of real world considerations not accounted for in the comparisons and benchmarking (like the fact their power consumption benchmarks were from *simulations*). We'll see how the chips really perform when real silicon arrives on the scene. Oh, and by the way -- I can actually *BUY* PICs, AVRs and MSP430's. Even if these new Maxim chips were real, I think most PIClisters know how realiable Maxim is for having stock available. I won't even get into pricing issues... And another thing, they only list Keil as the preferred tool source. Anyone familiar with Keil knows their tools are excellent, but we are looking at >$2500 for a C compiler/Assembler/Debugger suite. Ouch. So much for hobbyists or projects on a budget. Call me a skeptic, I'll be surprised if these chips are anything but moderately successful. They don't do anything that much better than the PIC, AVR or MSP430 family -- and those chip families all have a solid infrastructure complete with low-cost 3rd party tools available. Matt Pobursky Maximum Performance Systems -- http://www.piclist.com hint: To leave the PICList piclist-unsubscribe-requestKILLspammitvma.mit.edu

>Call me a skeptic, I'll be surprised if these chips are anything but >moderately successful. They don't do anything that much better than the >PIC, AVR or MSP430 family -- and those chip families all have a solid >infrastructure complete with low-cost 3rd party tools available. I'm generally in favour of SIC (Single Instruction Computer) architectures, I designed one myself, together with several AMUs (Arithmetic Movement Units). But, about the MAXQ, they didn't make any mention to the MHz they think they'll reach (but they claim to have made accurate simulations of power consumption, thus they could have provided some MHz figure as well). Moreover, using the PIC16 as comparation is unfair, to say the least. The MAXQ is probably superior even to the PIC18, but making such an unfair comparison abusing the PIC16 doesn't tell me many good things about the "honesty" of the whole presentation, and thus I tend to become skeptical also about the rest. For what we know, the chips may have such a complex logic that, not being pipelined, the max clock speed may very well be low, vanishing every advantages in terms of cycles/instruction. It's like in the times of Z80 vs 6502.. many 6502 supporters (I was among them) said that the 6502 was superior because of the lower average cycle count per instruction. But the Z80 was available at more MHz than the 6502.. I didn't understand, at that time, that by using the same fabrication process two designs may have different clock speeds. Evidently the Z80 gained back somewhere else (not really pipelined, but..) what it lost in the cycle count. Cycles per instruction say nothing, if one doesn't say also the max clock speed. I can make a CPU that calculates a logarithm function in just one clock cycle.. wow, but with a max clock speed of 100 KHz. So that should not be "wow", but "bad design". Having as little logic as possible between each clock cycle is what makes a good design (that's how I like to say it in my mind). You said it right.. that presentation has been written by some marketing guy.. those are truly skilled when it comes to convince us not to buy something. Anyway, let's wait and see something more concrete. -- http://www.piclist.com hint: To leave the PICList piclist-unsubscribe-requestspam_OUTmitvma.mit.edu

> I just received the engeneering review from Maxim. > If I only take a look at the pictures, > we should immediatly stop using PICs and AVRs and go for Maxim. > Judge yourself: > http://pdfserv.maxim-ic.com/en/ej/MER_3.pdf Two key issues seem to be missing: price and availability! Wouter van Ooijen -- ------------------------------------------- Van Ooijen Technische Informatica: http://www.voti.nl consultancy, development, PICmicro products -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

{Quote hidden}>-----Original Message----- >From: Ken Pergola [KILLspamno_spamKILLspamLOCALNET.COM] >Sent: 25 February 2004 21:55 >To: RemoveMEPICLISTTakeThisOuTMITVMA.MIT.EDU >Subject: Re: AVR, PIC or ... > > >Stef Mientki wrote: > >> I just received the engineering review from Maxim. >> If I only take a look at the pictures, >> we should immediately stop using PICs and AVRs and go for >Maxim. Judge >> yourself: >> http://pdfserv.maxim-ic.com/en/ej/MER_3.pdf > > >Hi Stef, > >Will make interesting reading. > >The PIC18 architecture has been out since 1999 -- I wish Maxim >used it for comparison instead of the midrange PICs. > >Regards, > >Ken Pergola Absolutely agree. The MAXQ20 at least seems to be a direct competitor to the 18F. The benchmarks are also mighty suspect to say the least. For starters no source code is shown for most of them, and the cycle count for the PIC's is frankly ludicrous e.g. Shift a 16 bit value right two bits, allegedly the PIC takes 40 cycles! clrc ;1 rrf val+1,f ;1 rrf val,f ;1 clrc ;1 rrf val+1,f ;1 rrf val,f ;1 I make that 6 cycles + a couple for initial bank setting if we are being fussy. How about sending an 8 bit value out on two pins, SPI style? They reckon the PIC takes 296 cycles to do this! I can only imagaine the guy who wrote the code must be a bit slack, because they'd never make up those numbers now would they? Regards Mike ======================================================================= This e-mail is intended for the person it is addressed to only. The information contained in it may be confidential and/or protected by law. If you are not the intended recipient of this message, you must not make any use of this information, or copy or show it to any person. Please contact us immediately to tell us that you have received this e-mail, and return the original to us. Any use, forwarding, printing or copying of this message is strictly prohibited. No part of this message can be considered a request for goods or services. ======================================================================= Any questions about Bookham's E-Mail service should be directed to spamBeGonepostmasterspamBeGonebookham.com. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

At 09:42 AM 2/26/2004 +0000, you wrote: >The benchmarks are also mighty suspect to say the least. For starters no >source code is shown for most of them, and the cycle count for the PIC's is >frankly ludicrous e.g. > >Shift a 16 bit value right two bits, allegedly the PIC takes 40 cycles! > >clrc ;1 >rrf val+1,f ;1 >rrf val,f ;1 >clrc ;1 >rrf val+1,f ;1 >rrf val,f ;1 > >I make that 6 cycles + a couple for initial bank setting if we are being >fussy. I think they are multiplying machine cycles by 4 to get Fosc cycles in PIC parlance. Make more sense? >How about sending an 8 bit value out on two pins, SPI style? They reckon >the PIC takes 296 cycles to do this! I can only imagaine the guy who wrote >the code must be a bit slack, because they'd never make up those numbers now >would they? Best regards, Spehro Pefhany --"it's the network..." "The Journey is the reward" TakeThisOuTspeffEraseMEspam_OUTinterlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads