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'8051 VS PIC ("Processor Wars")'
1999\03\03@203509 by Gerhard Fiedler

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At 20:05 03/03/99 +0000, Guy Sirton wrote:
>They execute an instruction in 4 cycles instead of 12 cycles on a
>classic x51 (I believe Dallas makes a 1 clock per cycle 51).

actually, the 8051 divides the 12 clock cycles per instruction into 4
states, each taking three cycles, and the dallas parts use only one cycle
per state, which makes them run at 4 cycles per instruction IIRC.

ge

1999\03\04@165559 by John Payson

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At 20:05 03/03/99 +0000, Guy Sirton wrote:
>They execute an instruction in 4 cycles instead of 12 cycles on a
>classic x51 (I believe Dallas makes a 1 clock per cycle 51).

|actually, the 8051 divides the 12 clock cycles per instruction into 4
|states, each taking three cycles, and the dallas parts use only one cycle
|per state, which makes them run at 4 cycles per instruction IIRC.

The processor clock on the 8x51 is equal to the crystal clock divided
by 12; most instructions (in syntactical, static, and dynamic analysis)
take one cycle, though all 3-byte instructions take two cycles, as do
all branching instructions, some logic instructions, PUSH, and POP.  In
addition, MUL and DIV take four cycles.

The Dallas 8xC520 uses a processor clock equal to the crystal clock
divided by 4; some instructions take one cycle, but unlike the 8x51
which can run 1- or 2-byte instructions in a single cycle, the Dallas
part requires a minimum of one cycle per instruction byte.  Although
about half of the available opcodes correspond to single-byte instr-
uctions, the multi-byte instructions are in fact used a lot more (esp.
in code which is optimized for speed on 8x51's) and so I'd estimate
that the real speedup is more likely to be 2x or less.

Of course, the PIC executes all instructions that don't modify PC in
only one cycle [4 clocks] each(*), so in many cases it'll significantly
outspeed any 8x51 variant (even the Dallas ones) running at the same
crystal rate.

(*) I generally prefer to regard "BTFSx" etc. instructions as always
   taking one cycle to execute, and skipped instructions as taking a
   cycle as well.  Considering execution speed this way, any code
   which does not jump will always take one cycle/word (a useful
   property when computing timing loops).  The only time this slight
   oversimplification fails is when computing--in detail--the behav-
   ior of the PIC when an interrupt occurs on a skipped instruction.
   In this particular case, the skipped instruction effectively takes
   zero cycles to execute.  I don't think that'll normally be a prob-
   lem, though...

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