Dan Smith wrote:
> Saw your posting on the PICLIST about the resistor||diode - cap trick,
> and would welcome any more info. I shall be developing a fire alarm
I just checked the schematic of the design I used the trick in...
I used a 4094 serial-in parallel-out SR with latched outputs. The ST
line causes the internal SR contents to be transferred to the output
latch. This is how I wired it:
OEN to VDD.
D to PIC's data out line.
CK to PIC's clock out line.
ST to 1N cap to VSS. ST also to 10K resistor. Other end of resistor to
ST to anode of 1N4448. Cathode to CK (diode is across resistor).
Data is clocked in on rising edge of CK. CK is normally kept low until
data is to be sent to SR.
For data bits except last one: Data is setup on D. CK is asserted and
then deasserted after data hold time.
For last data bit: Data is setup on D. CK is asserted and held for
3t(min), which causes ST to assert and the output latch to update. CK is
then deasserted to return to idle state.
3t = 3RC = 3 * 10K * 1N = 30uS.
The diode's ESR is going to be somewhere below 300R here, so a new cycle
could begin as early as 1uS after the previous one (and probably a lot
earlier than that).
If you don't like metal-gate CMOS then you could look for an equivelant
in the 74HCXXX line. Worst case: use a silicon-gate 74HC4094!
> I would have replied over the PICLIST, but I'm having to use an ST62XX in
> this application, so its not really PIC related.
I don't have a problem posting a reply to the PICLIST as it was a good
way to expand PIC output capacity.
Hope this helps.
Regards, Dana Frank Raymond
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