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'7 bit clock SPI problem on 16C74'
1999\05\06@041157 by Raffaele Rialdi

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Hi all,
I have interfaced a Burr-Brown A/D (ADS1213) to a 16C74 via SPI (master
mode).
Sometimes the communication hangs and I could see on the oscilloscope that
the problem is due to a wrong clock issued by the 16C74 SPI.

Every time the communication hangs I can see a 7 bit clock instead of the
normal 8 bit clock.
I use the SPI with clock = TMR2/2  at 9765.625 Hz.

Anyone experienced something similar before?

Thanks in advance,
Raffaele



Raffaele Rialdi
Vevy Europe Advanced Technologies Division
email spam_OUTraffaelerTakeThisOuTspamvevy.com

1999\05\06@085409 by Raffaele Rialdi

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Solved. Hope can be of help in the archives.

To avoid this problem, you have reset (clrf TMR2) just before
sending/receiving data.
In fact if TMR2 is very close to resetting, you could have a very short
clock (200ns at 20MHz clock) that would cause a 'de facto' 7 bit
communication.

Regards,
Raffaele


{Original Message removed}

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