'50 MHz frequency counter'
|On Tue, 10 Feb 1998 16:40:52 -0800 Andrew Warren <IX.NETCOM.COM> fastfwd
>> How ? a prescaler is out of the question if your counting "to a
>> single cycle"
It does use the presacler, and it does count to a single cycle. If you
count for 1 second and the input frequency is 49.501 MHz exactly, the
count will be 49,501,000. A change in the last digit corresponds to a
change of 1Hz in the input signal. If it counts for 0.1 second, the
count will be 4,950,100 and a change of 10 Hz can be detected.
The count can have any number of bits of resolution, though 32 is enough
for most practical purposes.
> The trick is to wire an I/O pin to the TMR0 input, in parallel
> with the incoming signal...
This is the old trick. Besides requiring a pin (unless you use the
open-drain transistor on the A4 pin of a 16-bit PIC), it presents a
variable (and low) impedance to the signal source. There is a better
trick, using the internal gate that selects between external and internal
clock to control the exact duration of the counting. The signal is
simply applied to the TMR0 pin with no extra hardware.
My successful program does this:
Set up the TMR0. I think the output of the prescaler needs to be slower
than every 2 PIC instructions, so that the 2-cycle delay between writing
TMR0 and it being able to increment isn't a problem. It works best to
just set it to 256 and leave it.
When the "sample gate" is to open, write 0 to TMR0 to clear the
While the "sample gate" is open, read TMR0 and add any new counts to a
larger accumulator in RAM.
When the "sample gate" is to close (which is determined by software
timing), write the OPTION register for the same prescaler value, but
internal clock. This does not clear the prescaler, which is what allows
the trick to work.
Take one final sample of RTCC and add it to the accumulator.
Finally, you need to determine the value that remains in the prescaler by
counting the number of PIC instructions before TMR0 increments again.
This is not too hard to do since there is more than one chance to read
it. It will continue incrementing every n PIC instructions, but at a
"phase" relative to the writing of the OPTION register that is determined
by the leftover count from the input signal.
I have some PIC code to do this but it's just about as incomprehensible
as the description above. Generally it works as follows (the prescaler
is set to 256):
If bit 0 of TMR0 is 1, delay 256 cycles (then it's certain to be 0)
Poll bit 0 of TMR0 every 4 cycles until it is 1. Count the number of
Wait almost a whole period (253? cycles), then take 3 samples of TMR0.0
at 1-cycle intervals:
rrf TMRO,w ;Sample 1 in C bit
movfw TMRO ;Sample 2 in W.0
Multiply the poll count by 4, then add 1 for each of the 3 samples taken
that were 1. The 8-bit result (plus a constant, depending on the delay
from setting the OPTIN register to starting the pulse-resolving process)
is the LSB of the final count. The MSBs are the count accumulator.
During the "sample gate open" phase of the measurement, there is lots of
time to scan an LED, etc. The amount of time taken needs to be exactly
accounted for since it is all part of one big software delay. The final
resolution takes about 1000 PIC clocks and has fewer opportunities to
interleave other processing.
Note that with any frequency-counting method, the accuracy of the result
depends directly on the PIC crystal clock. Ordinary microprocessor
crystals aren't going to work very well. For demanding measurements,
consider a TCXO.
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