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'18F452 register organization'
2003\02\12@172008 by John Nall

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Can anyone point me to a tutorial, or howto, on the register organization of
the 18F452 chip??  I have looked at the data sheet, and it is not  that
clear (although once I know the architecture I feel sure the documentation
will be crystal clear, as always happens :-)

For those of you who might reply with RTFM or generic equivalent thereof, I
will be glad to if you can point me to where the FM might be.  I figured the
data sheet would be it....

Thanks,
John

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2003\02\12@175338 by Timothy Box

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I'm no expert but as I see it.....


There are 15 GPR ram banks

The SF Regs are at the top of bank 15 address F60h to FFFh

GP ram from 0 to 5Fh is classed as Access ram and requires no bank switching
to access it. Just ref the location and you have it. The same is true of the
SFR's no bank switching needed. There is also some free GP ram at F00h up to
the SFR's at F5Fh this I think is Access ram.

Other than that it is just paging as before except you can just use MOVLB  ?
the ? being the bank required.

I say all is the same there is one extra thing. MOVFF requires no bank
switching. Since the 12-bit addresses are embedded into the instruction
word.


Hope that helps


Tim

{Original Message removed}

2003\02\12@175700 by Thomas Sefranek

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RTFM page 45, Table 4-1 "Special Function Register Map".

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2003\02\13@091403 by John Nall

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> >RTFM page 45, Table 4-1 "Special Function Register Map".


Oh.  OK.  :-~   (that is the symbol for an embarrassed grin).

John

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