> I am experiencing a strange prob in which I am pulsing
> mclr low several times while monitoring the clkout
> line. Every now and
> then, the device stops working correctly and the
> clkout line goes to like vdd/2. Pulsing mclr at this
> point does not reset the device and the clock does not
> appear to be running (or maybe it is but it's not
> there on clkout). The circuit is drawing about 140ua
> at this point compared to like 12ua during normal
> operation (the pic is normally asleep) and there are
> no inificant loads on the i/o pins. All the i/o pins
> go to high z when this happens and the only way to get
> things working again is to cycle the power. the same
> algorythm works fine on a 12c508 and most of the time
> on the 12c671 that's giving me the prob (does same
> thing on all three erasable 671's that I have). I'm
> quite perplexed - any ideas?
>
> Bob.
> __________________________________________________
> Do You Yahoo!?
> Talk to your friends online with Yahoo! Messenger.
> http://im.yahoo.com
>

> Bob,
>
> Are you setting ADCON1 to make the pins digital?
> or are you using the A/D's?
> Default is A/D.
>
> David
>
> ----- Original Message -----
> From: bob magno <.....m5i5k5eKILLspam.....YAHOO.COM>
> To: <EraseMEPICLISTspam_OUTTakeThisOuTMITVMA.MIT.EDU>
> Sent: Saturday, January 22, 2000 7:45 PM
> Subject: 12c671 Latching up or what?
>
>