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PICList Thread
'12C508: no interrupts.'
1998\10\22@041534 by netquake

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Hi!

Is it possible to imitate an external interrupt on a PIC12C508?

Thanks!

P.D.: I'm using MPLAB 3.99 (no other gear) and I cannot simulate a LOW
level on pin RB0/INT. I want to see if my code is responding fine (it
should call an interrupt service routine) but I'm stucked with the pin
stimulus 'unfriendly' menu option.
Any advice?

--------------------------------------------
"I must not fear. Fear is the mind-killer.
Fear is the little death that brings total
obliteration. I will face my fear... I will
permit it to pass over me and through me."

Kwisatz Haderach - Dune

       netQ
<spam_OUTnetquakeTakeThisOuTspaminnocent.com>

1998\10\22@045302 by James Cameron

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netQ wrote:
> Is it possible to imitate an external interrupt on a PIC12C508?

If you are willing to SLEEP, yes.

GP0, GP1, and GP3, can be enabled for wake-up on change, by setting bit
7 (GPWU) of the OPTION register.  After wake-up, execution will begin at
the reset vector and bit 7 (GPWUF) of STATUS will be set.

--
James Cameron                                    (.....cameronKILLspamspam@spam@stl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\22@100359 by Mike Sauve

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At 12:19 PM 10/21/98 -0200, netQ wrote...
>P.D.: I'm using MPLAB 3.99 (no other gear) and I cannot simulate a LOW
>level on pin RB0/INT. I want to see if my code is responding fine (it
>should call an interrupt service routine) but I'm stucked with the pin
>stimulus 'unfriendly' menu option.
>Any advice?

Try MPLAB 3.40. I've had problems with the '508 simulator and asynch pin stimulu
s when using 3.99.

Mike

1998\10\22@104854 by wwl

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On Thu, 22 Oct 1998 08:50:27 +0000, you wrote:

>netQ wrote:
>> Is it possible to imitate an external interrupt on a PIC12C508?
>
>If you are willing to SLEEP, yes.
>
>GP0, GP1, and GP3, can be enabled for wake-up on change, by setting bit
>7 (GPWU) of the OPTION register.  After wake-up, execution will begin at
>the reset vector and bit 7 (GPWUF) of STATUS will be set.
..although unfortunately you have to wait for the 256 cycle reset
timer, even if using the RC osc which doesn't need a startup delay!
This isn't very obvious from the data sheet. Only the 12C67x can start
instantly from a pin-change.

1998\10\22@123302 by Michael Hagberg

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according to my notes, on the 508 there is no RB0/INT (GP0) is only an I/O
port

this is the work around.

if you are not using the timer. then preload the timer with 0xFF and use
GP2/T0CKI to trigger the interrupt.

michael

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{Original Message removed}

1998\10\22@172337 by Octavio Nogueira

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>according to my notes, on the 508 there is no RB0/INT (GP0) is only an I/O
>port
>
>this is the work around.
>
>if you are not using the timer. then preload the timer with 0xFF and use
>GP2/T0CKI to trigger the interrupt.
>
>michael

And according to my knoledge and the Microchip datasheet
there is no Timer interrupt on the 12C508. Am I missing something?

Octavio
=======================================================
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1998\10\22@203916 by James Cameron

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Octavio Nogueira wrote:
> And according to my knoledge and the Microchip datasheet
> there is no Timer interrupt on the 12C508. Am I missing something?

I agree.  My 12C508 data sheet has no interrupts at all.  Timer overflow
has to be software detected.

--
James Cameron                                    (EraseMEcameronspam_OUTspamTakeThisOuTstl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\23@001810 by Michael Hagberg

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ok, you're right. next time maybe i'll look at the memory map and not just
the pinout.
should we ask microchip WHY the interrupts were disabled? what good is a
timer if it doesn't drive an interrupt?

michael

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   body of a message to LISTSERVspamspam_OUTMITVMA.MIT.EDU.

{Original Message removed}

1998\10\23@003402 by James Cameron

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Michael Hagberg wrote:
> ok, you're right. next time maybe i'll look at the memory map and not
> just the pinout. should we ask microchip WHY the interrupts were
> disabled?

I doubt it would be worth the effort.  I just accept it.  I doubt if
they were "disabled" as such, but I suppose it is possible.  Who knows,
maybe the chip is really another chip in disguise with fewer legs.  It's
been done.

> what good is a timer if it doesn't drive an interrupt?

It counts.  It saves you counting in software.  Either external events
or clock cycles, doesn't matter.  I'd say it is worth a bit.

--
James Cameron                                    (@spam@cameronKILLspamspamstl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\23@090458 by Morgan Olsson

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At 23:12 1998-10-22 -0500, you wrote:
>ok, you're right. next time maybe i'll look at the memory map and not just
>the pinout.
>should we ask microchip WHY the interrupts were disabled?

It saves 0.0001 cents of silicon...

>what good is a
>timer if it doesn't drive an interrupt?

So your software can multitask and do other things, while sometimes polling
the time.

/MOrgan
/  Morgan Olsson, MORGANS REGLERTEKNIK, SE-277 35 KIVIK, SWEDEN \
\  KILLspammrtKILLspamspaminame.com     ph +46(0)414 70741     fax +46(0)414 70331 /

1998\10\23@112638 by John Payson

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>>
Michael Hagberg wrote:
> ok, you're right. next time maybe i'll look at the memory map and not
> just the pinout. should we ask microchip WHY the interrupts were
> disabled?

I doubt it would be worth the effort.  I just accept it.  I doubt if
they were "disabled" as such, but I suppose it is possible.  Who knows,
maybe the chip is really another chip in disguise with fewer legs.  It's
been done.
<<

The die is unique to the 12C508, but internally it's basically the same as the
16C54 save for some changes in the I/O architecture (e.g. the smaller pin count,
the OSCCAL register, etc.)  Since the 16C54 has no interrupts, the 12C508 has
none either.

It would be nice to have a 14-bit part which was cheaper than the 12C671 for
cases where A/D's aren't needed but the other features are.  I don't know how
much more the 14-bit core costs (beyond the 17% ROM space increase) but I would
think the A/D would be responsible for more of the price increase than the 14
bit core.

>>
> what good is a timer if it doesn't drive an interrupt?

It counts.  It saves you counting in software.  Either external events
or clock cycles, doesn't matter.  I'd say it is worth a bit.
<<

If you don't have a timer, the only way to make events happen at a consistent
rate is to hand-count CPU cycles.  Every one of them.  While this is certainly
possible, it's not typically very pleasant.

By contrast, if you have code which is supposed to do a little bit of processing
every so often, you can use the timer to let you know when the magic moment has
arrived.  If your periodic routine needs to be executed with no "jitter" in its
timing and the "main program" underneath it will be doing actual work, the 12C50
8
architecture is not for you.

In many cases, though, it's possible to arrange programs in one of two forms:

MainLoop:
               Wait for the timer to mark the end of a clock tick
               Do some stuff
               goto    MainLoop

MainLoop:
               Do the stuff you do continuously
               See if the timer tick is done yet
               If not, goto MainLoop
               Do the stuff you only do once in awhile
               goto    MainLoop

For applications that fit in one of these two molds, one may as well take advant
age
of the pennies that can be saved by using the simpler architecture.  For applica
tions
where this paradigm is not acceptable, simply use another CPU.


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1998\10\24@121025 by miked

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> ok, you're right. next time maybe i'll look at the memory map and not just
> the pinout. should we ask microchip WHY the interrupts were disabled? what
> good is a timer if it doesn't drive an interrupt?
>
> michael
>

The 12C50x parts are a 12 bit core like the 16C54 series, which never had any in
terrupts.
The 12C67x parts are 14 bit core devices.

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