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'[pic]:Moving serial routines from 16c74A to 16F877'
2001\02\21@160748 by Alice Campbell

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Gentlebeings:

I am about to move some code originally written (not by me)
for a 16C74A to a 16F877.  Are there any 'gotchas' to watch
out for?  I am particularly concerned about the serial
routines possibly being different. There's about 3K of code
there, and memory banking appears to be correctly
implemented.
Thanks,
Alice

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2001\02\21@171422 by Tony Nixon

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Alice Campbell wrote:
>
> Gentlebeings:
>
> I am about to move some code originally written (not by me)
> for a 16C74A to a 16F877.  Are there any 'gotchas' to watch
> out for?  I am particularly concerned about the serial
> routines possibly being different. There's about 3K of code
> there, and memory banking appears to be correctly
> implemented.
> Thanks,
> Alice
>
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The UART works the same, The A2D is different (8 bit Vs 10 bit), RAM is
different (top end of each page) and 2 extra banks so STATUS [RP1 and
IRP] come into use, EEPROM registers added, Fuse changes, ROM from 74 to
877 should work ok, plus extra 4K available.

Probably other changes too.

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Tony

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2001\02\21@174434 by Dipperstein, Michael

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If you're sure the banking is correct, then you're where I was when I went from
a 16C77 to a 16F877.

Be sure your config word is correct.  If the ICD is enabled, you loose RB6 and
RB7.

If you're bit-banging an IIC master, you might want to let the hardware handle
it.

If you were using the A/D, you'll have to make a few changes for the 10-bit
A/Ds, even if you just want 8-bits resolution.

-Mike
{Original Message removed}

2001\02\21@175014 by Mike Mansheim

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>> I am about to move some code originally written (not by me)
>> for a 16C74A to a 16F877.  Are there any 'gotchas' to watch
>> out for?  I am particularly concerned about the serial
>> routines possibly being different. There's about 3K of code
>> there, and memory banking appears to be correctly
>> implemented.

> The UART works the same, The A2D is different (8 bit Vs 10 bit), RAM is
> different (top end of each page) and 2 extra banks so STATUS [RP1 and
> IRP] come into use, EEPROM registers added, Fuse changes, ROM from 74 to
> 877 should work ok, plus extra 4K available.

If the original code used RB3 as an i/o, you will need to disable Low
Voltage Programming in the fuses.
The a/d's *should* work correctly despite the change to 10 bits.  In the
F877, the a/d result is left justified by setting ADFM = 0.  Left
justification puts the upper 8 bits in ADRESH (0x1e), which is the same
as ADRES in the c74.  ADFM is bit 7 of ADCON1, which was an
unimplemented bit in the C74, and should have been zero.  So, if the
original code set ADCON1, bit 7 to zero, the a/d's should work as is in
the F877.

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2001\02\22@035146 by teecy

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The chances are that it will run without any modification.  The only real
problem could be the top 16 bytes of memory banks 1,2 and 3 as they overlap
the top 16 bytes of bank 0.  I am in the process of converting a very full
16C74 using almost all of the peripherals, to a 16F877 and the memory
overlap is by far my biggest problem as I make extensive use of indirect
addressing.

Dave T.

{Original Message removed}

2001\02\22@084748 by mike

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On Wed, 21 Feb 2001 13:08:51 -0800, you wrote:

>Gentlebeings:
>
>I am about to move some code originally written (not by me)
>for a 16C74A to a 16F877.  Are there any 'gotchas' to watch
>out for?  I am particularly concerned about the serial
>routines possibly being different. There's about 3K of code
>there, and memory banking appears to be correctly
>implemented.
>Thanks,
>Alice
Apart from what others have mentioned, there is some extra
configurability of the sync serial port - clock polarity selection. (I
think this came in on the 16C63/65 -A versions, and the 74B, if there
is one.)

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