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'[ot]: are there sram chips that use the i2c'
2001\08\29@171409 by Jinx

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> Check the archives. I think it's been determined that there
> really aren't any of any appreciable size. I've ended up
> going with byte wide SRAM and using latches to latch the
> addresses off 8 data lines leaving the PIC.
>
> Harold

I remember that topic and had a little discussion off-list. The
best the two of us could come up with was a module that had
a 12C508 as the I2C interface (including an ID function),
address drivers, and an SRAM or NVRAM to suit. Functionally
it would look like an I2C peripheral but would be slower because
of the decoding process of the 12C508 and drivers

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2001\08\30@022840 by Dan Michaels

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Jinkalinx wrote:
>> Check the archives. I think it's been determined that there
>> really aren't any of any appreciable size. I've ended up
>> going with byte wide SRAM and using latches to latch the
>> addresses off 8 data lines leaving the PIC.
>>
>> Harold
>
>I remember that topic and had a little discussion off-list. The
>best the two of us could come up with was a module that had
>a 12C508 as the I2C interface (including an ID function),
>address drivers, and an SRAM or NVRAM to suit. Functionally
>it would look like an I2C peripheral but would be slower because
>of the decoding process of the 12C508 and drivers
>

I designed a couple of my own boards to handle the
PIC = lack_of_available_RAM problem.

One is a full-blown SBC for 40-pin PICs which holds a 32-512KB
SRAM chip, and the other is a small pcb about 2" x 2.25" which
holds a 44-pin PLCC PIC74/etc plus 2 32K SRAM chips. The 2nd
one would allow I2C accesses - provided someone wrote the
firmware - which I never got around to doing. I have a few
of the pcbs around if anyone wants to grind their own code.

- dan michaels
http://www.oricomtech.com
==========================

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