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'[SX] SX52 Soft Core'
2006\03\25@073953 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Hi,
I'm in the process to releaze the first SX52 IP core in VHDL developed at the University of the West Indies, Trinidad and Tobago.
Regards,
LN.

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2006\03\25@074013 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Hi,
I'm in the process to releaze the first SX52 IP core in VHDL developed at the University of the West Indies, Trinidad and Tobago.
Regards,
LN.

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2006\03\25@101632 by johncouturen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, johncouture wrote:

Aime,
Interesting.  I had to look up VHDL to figure out what you were talking about but that does sound like a momumental task.


For the rest of us, Aime is talking about describing the internal structure of the SX52 using a standardized language for describing digital electronic systems (the chip internals).  This language, VHDL (V Hardware Description Language, the V seems to be short for Very High Speed Integrated Circuits??), was adopted as a standard by the IEEE and is used to describe the structure of the design and its subsystems.  Looks pretty interesting!


Anyway, a free download tutorial on VHDL is at:

http://tams-www.informatik.uni-hamburg.de/vhdl/doc/cookbook/VHDL-Cookbook.pdf
Aime,  will you be posting your design on a web page?

For those of you that haven't been to the West Indes, GO! its  a BEAUTIFUL area.  I have only been as far south as Grenada but there is nothing like swiming in ocean water that is over 80 degrees (I live in San Diego area and water off our coast is about the same as Rhode Island brrrrr).

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2006\03\25@122458 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

The VHDL coding of the SX52 Core is finished; we are presently doing some testing (Simulation & Formal Verification).
The design is well documented for those who are interested in using it for an embedded project. We haven't decided yet if it would be an open core with a GNU license.

Aime.

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2006\03\25@123029 by gibbmann/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, gibbman wrote:

VHDL (and Verilog) are usable by the Altera FPGAs by running them through the native Altera development tools, like Quartus(?). I am scheduled to attend an Altera 1-day training session next month, and I'm really looking forward to it. I think that Parallax developed the new Propeller chips by prototyping in Altera FPGAs, but I might be wrong on that.
Jim
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2006\03\25@124201 by g_daubachn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, g_daubach wrote:

Aime,
as you may know, have I written SXSim for Windows, a simulator for all available types of the SX. When I started this project in VB, I never thought that SXSim would be accepted by the SX communitiy as it actually is. So - besides the enhancements I have added meanwhile, I have more features in mind that turns SXSim more into an analyzing tool for the SXes.

Due to the already added new features, the code becomes larger and larger, and real-time simulation is very slow, i.e. far away from a real SX clocked at 50 MHz.

Do you think the VHDL implementation could be used as a "plug-in" for a shell program acting like the current SXSim IDE which comes close to the look-and-feel of the SX-Key IDE? For coding the IDE, I'm not stuck to VB. I could also do it in C# ir C++, for example.

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2006\03\25@161309 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Hi Günther,
It's a pleasure replying a thread from somebody like you to whom I have a lot of respect.  You have done a lot for the SX developers' community. Well done Günther.
Couple years ago I was looking for a nice SX simulator and I found SXsim, which was quite satisfactory. I believe that SX processors are among the most powerful 8-bit microcontrollers but they did not get the popularity as their Pic counterparts because of lack of support tools.  To my knowledge there is not out there a good ansi-C compiler and also an efficient simulator for these devices.  I have tried to carry address these shortcomings in sw and HW.  I would refrain to talk about a SW tool for SX, which competes SX-Key  Tool that we have developed.
Concerning the HW aspect, we have tried to develop an Sx IP core for embedded SOC design projects.  The present version doesn't have an on-chip HW debugger but this feature is being worked out.  Yes Günther it can be used as a shell for the SXSim IDE, which certainly will increase exponentially the speed of the SXSim. This combination could be used for fast simulation/debugging before any  programming of the application on a normal asic SX controller from Ubicom.


Warm greetings from the Twin-Island Republic of Trinidad and Tobago.

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2006\03\27@091906 by Electronegativityn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Electronegativity wrote:

Hi Aime.

What you have done sounds very similar to the Picoblaze processor core that Xilinx includes in its Embedded Development Kit.
They also have a 32 bit version called Microblaze.
I have recently become interested in programming FPGAs and it seems like these "Soft" microprocessors could make my life a lot easier. The only thing stopping me is the $500 price tag on the Xilinx EDK.

If you are offering this software for free then I will be standing outside your door with my begging bowl.

Are you a student or a professor?

-Alexander
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2006\03\27@135757 by lordsteven/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, lordsteve wrote:

electronegativity,

http://www.xess.com
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2006\03\28@045137 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Hi Alexander
Yes it's. Xilinx has a free version of the ISE (Xilinx Wepack ISE ) that can be downloaded from their web site. You also need a good simulator like modelsim but it's not free. I recall there is a good free simulator out there from http://www.symphonyeda.com/.  The SX IP Core can be synthesized with Xilinx and Altera Tools.  
I haven't decided if that will be free, but certainly the design has been very tedious. This Soft core is part of a SW/HW Codesign Development tool for the SX microcontrollers.

Corning your last question, I will let you guess.

Regards,
Aime.

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2006\03\28@053835 by SteveWn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, SteveW wrote:

Xilinx provide a free version of modelsim with ISE. It's limited in design size, so simulating whole micros isn't going to work, but it's great for pretty much everything else. I use it extensively for open designs.
(And, for anyone thinking that Microblaze and the Xilinx EDK sounds like fun, we've been using it here, and it's not really very usable yet, if you want to do more than toy projects. Give it a couple more major revisions - it's getting better fast, but, at the moment, I wouldn't wish it on my enemies...)
Steve
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2006\03\28@084626 by Electronegativityn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Electronegativity wrote:

Thanks for all the good links!

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2006\03\28@092530 by George Herzogn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, George Herzog wrote:

Obviously the SX52 soft core would apply and be useful for the SX48.

But, I am wondering if this may help and eventual revival of the SX52?

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2006\03\28@095032 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Hi Kramer,

Yes indeed. The core can be customized to cover the entire SX family.

I hope that will revive the Sx52.


Aime.

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2006\03\28@111153 by Assaffn/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Assaff wrote:

Dear Aime
Can you tell me the size of FPGA required and speeds that can be achieved with your SX52 core?

Thanks
Assaff
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2006\03\30@043730 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Dear Assaff,
Please bare with me, actually we are finalize the testing on a Spartan 3-100 chip, that is to be extended to other devices of lower sizes.  I cannot say any thing about the speed until the core be completed tested.


Regards,
Aime
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2006\03\30@043847 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Dear Assaff,
Please bare with me, actually we are finalize the testing on a Spartan 3-100 chip, that is to be extended to other devices of lower sizes. I cannot say any thing about the speed until the core be completely tested.


Regards,
Aime
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'[SX] SX52 Soft Core'
2006\04\04@173409 by Electronegativityn/a
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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Electronegativity wrote:

Hi everybody.

I followed John Coture's link to the VHDL cookbook.
It describes a VHDL structure called the DP32 processor.
Does this work?

Is there a decent freeware VHDL program that will emulate as a 32 bit processor?
It doesn't need to simulate an entire chip, just provide some registers and execute simple assembly code.

Thanks,
-Alexander
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2006\04\05@065613 by Aimen/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Aime wrote:

Dear Assaff,
We are still continuing with the testing and verification. So far we are synthesizing the soft core on a spartan 3-400 in
which the block rams are used to implement the 4K ROM. This is done on fly by generating the memory content in VHDL from an HEX file.
Without optimization the max speed is 112 MHz.  Our intention is to have different flavours of the SX 52 Soft core (with ROM of 4K, 8K, 16K,  64K, and why not  256K for Virtex chips ) that can be generated on fly. We have also in mind to extend the soft core for parallel flasm/Ram and serial EEprom interfacing.

Regards,
Aime
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2006\04\10@074632 by dkemppain/a

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In SX Microcontrollers, SX/B Compiler and SX-Key Tool, dkemppai wrote:

[Quoting: "Aime"]
Dear Assaff,
We are still continuing with the testing and verification. So far we are synthesizing the soft core on a spartan 3-400 in
which the block rams are used to implement the 4K ROM. This is done on fly by generating the memory content in VHDL from an HEX file.
Without optimization the max speed is 112 MHz. Our intention is to have different flavours of the SX 52 Soft core (with ROM of 4K, 8K, 16K, 64K, and why not 256K for Virtex chips ) that can be generated on fly. We have also in mind to extend the soft core for parallel flasm/Ram and serial EEprom interfacing.

Regards,
Aime

Interesting way to 'extend' the power of the SX Processor. Of course, you won't have access to onboard
comparator, and won't have the oscillator driver for the crystals and resonators, and probably won't have the ability to directly support 5 volt cmos and ttl logic, but interesting none the less.


Maybe this could be a stepping stone to build a larger more powerful version of the SX. Maybe something that supports larger math functions, etc...   ...of course, once the IP core is built, then silicon is only a mask away...



-Dan
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