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'[SX]: SX18 internal RAM'
2002\12\06@232957 by Jinx

face picon face
I'm a little confused by the RAM memory map of the SX18.

The map shows that $08 to $0F are available as global RAM.
Then there are 8 banks of 16 RAM, with addresses  $10-$1F,
$20-$2F and so on

The program I'm writing now uses 27 variables, and two blocks
of 9 variables each of those 27 would be most efficiently used
via FSR/IND

What would be the best way to organise this ? For example, do
I use an ORG for each Bank, something like

org $10

variable1
to
variable9

org $20

variable10
to
variable18

If true, then does this mean FSR is loaded with the RAM address
in each Bank as you want to access them, similar to the way that
you would with the PIC to, for example, copy RAM from one bank
to another

mov fsr,#$10 to get to variable1 to variable9

mov fsr,#$20 to get to variable10 to variable18

TIA

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2002\12\07@004128 by pearl62

picon face
The RAM bank addresses that you mention are for an SX48 or SX52. The
SX18/20/28 RAM banks are at $30-3F, $50-5F, $70-7F, $90-9F, $B0-BF, $D0-DF
and $F0-FF.

Your method of allocating the variables and using FSR is correct, just use
the addresses above. You could also just use the BANK instruction, like bank
$30.


{Original Message removed}

2002\12\07@012730 by Jinx

face picon face
> The RAM bank addresses that you mention are for an SX48 or
> SX52. The SX18/20/28 RAM banks are at $30-3F, $50-5F,
> $70-7F, $90-9F, $B0-BF, $D0-DF and $F0-FF

The locations I quoted were from the SX-Key Development Manual,
which, now that you've pointed it out and I double-check, I see is just
a simplistic form of the SX18 datasheet. It's actually misleading
because it differs so much from the SX ds

> Your method of allocating the variables and using FSR is correct,
> just use the addresses above. You could also just use the BANK
> instruction, like bank $30

Thanks. My fault for not referring back to the SX manual, although
a piece of example code to illustrate would have been nice

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2002\12\07@015708 by pearl62

picon face
The SX datasheet has short examples of using the FSR and BANK intructions,
and most VP's (available from http://www.sxlist.com) also provide a good example.

Cheers,
Stephen
{Original Message removed}

2002\12\07@020535 by pearl62

picon face
The Parallax manuals were written without any review from Ubicom (Scenix at
the time), and always had some differences to the actual silicon datasheets,
so I would not stand behind the data provided there. It's always best to get
the information from the guys who made the product. Parallax can document
their tools well enough, but you should go to the Ubicom datasheets to get
the info on the chip...

BTW, here's a link to the VP's on the SX-List site...
http://www.sxlist.com/techref/ubicom/virtperf.htm

The 16-bit Timer VP is a simple example written in the standard template
that was used in later VP development
(http://www.sxlist.com/images/sxlist/timer_vp.src). There's alot there for
such a simple function, but the template provides defines for just about
every register in any of the SX's.


{Original Message removed}

2002\12\07@022623 by Jinx

face picon face
> Thanks. My fault for not referring back to the SX manual,
> although a piece of example code to illustrate would have
> been nice

In the manual I meant

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2002\12\07@035849 by Jinx

face picon face
> The SX datasheet has short examples of using the FSR and
> BANK intructions, and most VP's (available from http://www.sxlist.com)
> also provide a good example.

Thanks. I'm just getting the hang of these Virtual Peripherals.
It's a bit of a shock after being so spoiled with micros that have
all kinds of built-in analogue and h/w features to work again
with a plain vanilla device. But it's worth the effort. The current
project is transferring 8-bit data from a PIC to an SX between
the SX motor control pulses. A reliable pick-up in 60ns seems
to be working just fine - it's great having so many cycles to
play with

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2002\12\07@040512 by pearl62

picon face
Yeah, it's pretty amazing what can be done with a really fast clock and some
determinism...

Cheers,
Stephen

{Original Message removed}

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