Exact match. Not showing close matches.
'[PICS] Interrupt on change'
|Bob Blick <parallaxinc.com> wrote: pics
> It's my understanding that if interrupt-on-change is enabled, it is
> enabled for all four pins(RB4,5,6,7), no choosing. Let's use a
> PIC16C72 as an example.
> I'm not clear on the use of those four pins if some are used solely
> as output pins. My questions are:
> If I use two of the pins(RB4,5) for outputs, the other two(RB6,7)
> for inputs, and enable interrupt-on-change, will my manipulation of
> the two output pins cause an interrupt, or otherwise mangle the
> correct operation of the interrupt?
No. The change-on-portb interrupt is only triggered when INPUT
pins change states.
> Second question: will reading port B mess with the use of the
> interrupt-on-change feature?
Probably. If a change occurs just as a read operation is being
performed on port B, no interrupt will be generated.
Worse, it seems that even WRITING to port B can make the PIC
miss interrupts, since ALL register accesses (even MOVWF, etc.)
perform a read first.
> Do I need to use the first four pins(RB0,1,2,3) of port B
> output-only if I enable interrupt-on-change? Must I read port B only
> when servicing the interrupt?
Doing those things will HELP the situation, but they won't
guarantee that you'll never miss interrupts. In general, the only
time the change-on-portb interrupts are truly reliable is when
they're used to wake the processor from Sleep Mode.
As I said in the answer to a similar question posted to my
company's web page, "Sucks, don't it?"
Sorry to be the bearer of bad news.
=== Andrew Warren - ix.netcom.com === fastfwd
=== Fast Forward Engineering - Vista, California ===
=== Custodian of the PICLIST Fund -- For more info, see: ===
=== http://www.geocities.com/SiliconValley/2499/fund.html ===
More... (looser matching)
- Last day of these posts
- In 1996
, 1997 only
- New search...