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'[PICLIST] frequency multiplier'
2000\12\19@233228 by Jane Ifurung

picon face
thanks, mr. robert. i'll implement it and notify you
of the results. how to divide by 2? using flip-flop?

jane
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'[PICLIST] frequency multiplier'
2001\01\10@043719 by Jane Ifurung
picon face
Mr. Robert, I tried the frequency doubler you
suggested and I've got a fair output. The thing is,
it's not very exact and it's not symmetric. I used
HC244 buffers for the delay and 74LS86 XOR. To solve
for the duty cycle, I tried to cascade two frequency
doubler and connect it to divide-by-two flip-flop. But
the problem is, the output goes back to the input
frequency. I checked my connections and nothing's
wrong. Is there a loading effect? Is there a mismatch
between the HC and LS? I tried using LS244 and LS86
but the problem is still the same.


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2001\01\10@055654 by Simon Nield

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jane:
>for the duty cycle, I tried to cascade two frequency
>doubler and connect it to divide-by-two flip-flop. But
>the problem is, the output goes back to the input
>frequency.

you may find that making the two RC networks different will fix this.
try halving the R in one of the networks for example.

(reasoning: if the two networks are _exactly_ the same then you just end up with pulses that are
twice as wide after the second network... of course in real life the two networks will not be quite
identical even with the same nominal value components, this will give a glitch as wide as the
difference between the two networks in the center of the stretched pulse. this glitch may or may not
be too fast for the flip-flop to see it.)

Simon

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2001\01\11@201349 by Jane Ifurung

picon face
Sir, I did not use resistors and capacitors for the
delay since a single 74C244 (sorry, I mentioned to you
before it's 74HC244) buffer is enough to come up with
"approximately" 1/4 delay of the period of the
frequency to be doubled. I tried using R and Cs but I
can't get the correct frequency output. That's why I'm
not using R and Cs.

Now, I've got the wrong solution to my problem. I did
not use different delays for the cascaded doublers.
Sorry. So, you mean I have to use the 74C86 XOR too
and not 74LS86?

By the way, the XX244 are schimdt trigger.
I'm doubling 704 KHz and 2.048 MHz. I also need a X8
multiplier with inputs of 4 and 8 MHz.

Mr. Rolf, thank you for addressing my problem.

More power to you,
Jane



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2001\01\11@203608 by Jane Ifurung

picon face
I have a difficulty using R & Cs that's why I just
used 74C244 buffers for the delay. Thanks anyway.

Jane
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'[PICLIST] Fw: Frequency multiplier'
2001\08\24@123822 by Saurabh Sinha
picon face
Good day. I am trying to design a frequency multiplier. I want to input a frequency from 1kHz to 10kHz, and I want to multiply the frequency by 100, to get an output frequency from 100kKz to 1000kHz. I am quite desperate for a solution that requires very little circuitry and is accurate, so any help would be appreciated.
Or just give me a hint or any ideas on how I could do this!
Thank you.

Regards,

S. Sinha (Saurabh)
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2001\08\24@124737 by David VanHorn

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At 06:38 PM 8/24/01 +0200, Saurabh Sinha wrote:
>Good day. I am trying to design a frequency multiplier. I want to input a
>frequency from 1kHz to 10kHz, and I want to multiply the frequency by 100,
>to get an output frequency from 100kKz to 1000kHz. I am quite desperate
>for a solution that requires very little circuitry and is accurate, so any
>help would be appreciated.
>
>Or just give me a hint or any ideas on how I could do this!

To multiply, one must first divide :)

A 4046, with the VCO output divided by 100, ought to work well here.

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2001\08\24@143505 by Saurabh Sinha

picon face
Thanks David. I know this is an obvious solution, but wondering if there's
easier analog ways! I have been (for a long time) looking for a SPICE model
for the 4046, since you mention it, just wondering if you may have it?
Please let me know.

Regards, Saurabh

{Original Message removed}

2001\08\24@144330 by David VanHorn

flavicon
face
At 08:35 PM 8/24/01 +0200, Saurabh Sinha wrote:
>Thanks David. I know this is an obvious solution, but wondering if there's
>easier analog ways! I have been (for a long time) looking for a SPICE model
>for the 4046, since you mention it, just wondering if you may have it?
>Please let me know.

I avoid analog simulation, so many variables to include.
I prefer hardware :)

Another way might be with a step recovery diode, but I don't know if you
can make that work in this freq band, and over such a relatively large range.
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2001\08\24@152303 by Saurabh Sinha

picon face
Ok, what's the loop filter design criteria?

Thanks.

Saurabh
----- Original Message -----
From: "David VanHorn" <RemoveMEdvanhornKILLspamspamCEDAR.NET>
To: <PICLISTSTOPspamspamspam_OUTMITVMA.MIT.EDU>
Sent: Friday, August 24, 2001 8:43 PM
Subject: Re: [EE] Frequency multiplier


> At 08:35 PM 8/24/01 +0200, Saurabh Sinha wrote:
> >Thanks David. I know this is an obvious solution, but wondering if
there's
> >easier analog ways! I have been (for a long time) looking for a SPICE
model
> >for the 4046, since you mention it, just wondering if you may have it?
> >Please let me know.
>
> I avoid analog simulation, so many variables to include.
> I prefer hardware :)
>
> Another way might be with a step recovery diode, but I don't know if you
> can make that work in this freq band, and over such a relatively large
range.
> --
> Dave's Engineering Page: http://www.dvanhorn.org
>
> I would have a link to http://www.findu.com/cgi-bin/find.cgi?KC6ETE-9 here
> in my signature line, but due to the inability of sysadmins at TELOCITY to
> differentiate a signature line from the text of an email, I am forbidden
to
> have it.
>
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2001\08\24@152844 by David VanHorn

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At 09:22 PM 8/24/01 +0200, Saurabh Sinha wrote:
>Ok, what's the loop filter design criteria?

Been a while since I used one, but National's website (http://www.natsemi.com)
should have all the info.
If you don't need real fast response, I'd suggest overdamping, as it makes
the loop easier to design.

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'[PICLIST] [EE] Frequency multiplier All Digital PL'
2001\08\28@021301 by norman

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face
This link maybe of interest to people interested in digital PLL's


http://www-s.ti.com/sc/psheets/sdla005b/sdla005b.pdf

This is a part that has been around for sometime. However the concept is
very valid.



With clever programming I am sure you can implement a low speed PLL
in software.


Norman Gillaspie
PCS Engineering
325 Sharon Park Dr. #210
Menlo Park, Ca 94025
Tel 650-854-5263
Email @spam@norman@spam@spamspam_OUTpcseng.com
All Digital QAM QPSK 8PSK 8VSB MPEG DVB Modulators and RF Converters
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'[PIC]: Frequency multiplier?'
2003\04\23@210456 by Gary Neal
picon face
Hi,

I've got a variable frequency signal (200hz to 4khz) whose frequency I want
to increase by 30% (5v signal).  IE if the input frequency is 1000hz, I
want to output 1300hz.  Is there an easy method of doing this?  I've heard
of PLL, but don't have a clue how to build them, so if there's an easier
option that would be great.

Thanks,

Gary

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2003\04\23@214027 by Bob Ammerman

picon face
> I've got a variable frequency signal (200hz to 4khz) whose frequency I
want
> to increase by 30% (5v signal).  IE if the input frequency is 1000hz, I
> want to output 1300hz.  Is there an easy method of doing this?  I've heard
> of PLL, but don't have a clue how to build them, so if there's an easier
> option that would be great.
>
> Gary



It depends on what you need to do with the signal.

If the resulting output signal can have significant jitter, and unequal size
cycles then this job can easily be done with a single component: an 8-pin
PIC. If you need to keep a 'square wave' output then it gets a little
trickier, but can still be done in a small PIC.

Just to give you an idea of how you could do it if jitter and output cycle
size don't matter:

; =====================
; The main loop. Each iteration of this loop processes ten
; cycles of the input signal (in the copypulse routine). Three of
; those cycles are doubled by calling the outpulse routine
; to send an extra pulse in the low portion of the input
; pulse.

mainloop:
   call    copypulse
   call    copypulse
   call    copypulse
   call    outpulse
   call    copypulse
   call    copypulse
   call    copypulse
   call    outpulse
   call    copypulse
   call    copypulse
   call    copypulse
   call    outpulse
   call    copypulse
   goto    mainloop

; ===== copy an input pulse to the output pin ======

copypulse:

; look for the rising edge

waithi:
   btfss    INPUT
   goto    waithi
   btfss    INPUT
   goto    waithi

; we just saw a rising edge, copy it to the output

   bsf    OUTPUT

; wait for the input to go low again

waitlo:
   btfsc   INPUT        ; wait for input to be low
   goto    waitlo
   btfsc    INPUT       ; check twice to protect against glitches
   goto    waitlo

; we just saw a falling edge, copy it to the output

   bcf    OUTPUT
   retlw 0

; ===== output an extra pulse =====
;
; At 4Hz (the maximum input frequency) the low level during
; which we have to output our extra pulse lasts for 1/8000
; of a second. We have to fit a low-high-low into that time
; to fit our pulse in. To allow for input jitter and modest
; overfrequency we'll set the time for the first low and high
; to about 1/32000 of a second

outpulse:
; output low for 1/32000 of a second
   call    delay            ; delay 1/32000
; output high for the next 1/32000
   bsf    OUTPUT
   call    delay
; output low until the next pulse
   bcf    OUTPUT
   retlw    0

Bob Ammerman
RAm Systems

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2003\04\24@010607 by Picdude

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Since you put this as the [PIC] topic, I'm going to invent a PIC solution for this, which I haven't tried, but thinking should be doable...

Measure the low-time and high-time of the first pulse, then generate pulses at 130% the frequency of that ..... repeatedly in a loop.  While that's happening, in a sort of feedback mechanism, count both input and output pulses and adjust accordingly by offsetting the next pulse(s).

This method should provide low jitter, but would add a small (approx 1/2 to 1-pulse) delay from input to output, and depending on the actual coding, may introduce a limitation on how fast the output will follow the input on freq change.

Of course this is not totally trivial, but it should be doable with any simple PIC.

Cheers,
-Neil.    




On Wednesday 23 April 2003 20:08, Gary Neal wrote:
{Quote hidden}

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2003\04\24@012452 by Reinaldo Alvares

picon face
I have done sort of this before. I had a shaft encoder giving to few pulses
out, so the plan was to multiply the incoming A and B pulses by some factor.
I measured the width of the incoming pulse, divided the time into the
multiplying factor and outputed the needed amount of pulses with the width
proportional to the incoming pulse. Everything worked fine for more or less
steady rotation of the shaft (approximately constant frequency). When the
shaft was accelerating fast or breaking fast everything was wrong, the unit
started to drop pulses for obvious reasons. So I'm very interested to hear
if everyone has a better idea of how to do this but with changing
frequencies at a fast rate.
best regards
RA
{Original Message removed}

2003\04\24@075926 by Olin Lathrop

face picon face
> I've got a variable frequency signal (200hz to 4khz) whose frequency I
> want to increase by 30% (5v signal).  IE if the input frequency is
> 1000hz, I want to output 1300hz.  Is there an easy method of doing
> this?  I've heard of PLL, but don't have a clue how to build them, so
> if there's an easier option that would be great.

A PLL (Phase Locked Loop) could be a solution.  If you don't have a clue
about them, then learn or get someone else to do the design.  There's got
to be loads of material out there on PLLs, so I won't repeat most of it
here.  Basically, you can use a PLL to multiply a frequency by a rational
number.  However, things get more tricky as the integers get larger and
the frequency range ratio gets wider.

Depending on response speed, a PIC might be another solution.  You could
use a CCP module in capture mode to determine the incoming period, then
use PWM output to produce a signal with .77 of the input period.


*****************************************************************
Embed Inc, embedded system specialists in Littleton Massachusetts
(978) 742-9014, http://www.embedinc.com

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2003\04\24@081414 by Nigel Orr

flavicon
face
pic microcontroller discussion list <> wrote on Thursday, April 24, 2003
12:57 PM:

> A PLL (Phase Locked Loop) could be a solution.  If you don't have a
> clue about them, then learn or get someone else to do the design.
> There's got to be loads of material out there on PLLs, so I won't

There is loads of material.  Unfortunately much of it is quite confusing,
at least to me... with arbitrary 2*pi appearing in some app notes etc, and
not in others, and contradictory advice on choosing the right phase
comparator for best performance.  The PLL section in Horowitz & Hill is
still the plainest advice I've come across on the subject, it's nice to see
books still have value :-)

I've produced a PLL circuit for a low speed noisy FSK comms link.  It
works, but I can't help thinking it should work better, the VCO signal
needs quite a lot of post-filtering to get reliable data out.  If anyone
has any good pointers on FSK demodulation, choosing the right phase
comparator and loop filter design, I'd love to hear them- the FSK is a
couple of kHz, data rate a few 10's of bps.

The principle is easy to understand, and it sounds like the 'right'
solution for the OP's problem, but the practicalities seem more complex.  I
know it's not just me, I've never met anyone who claims to be expert in
PLLs in Real Life(TM), and only a few who claim to be, online...

Nigel
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2003\04\28@104105 by Bill & Pookie

picon face
Looking at the question as inputting a signal with
a 50% duty cycle and outputting a signal 130%
greater with a 50% duty cycle, here is my
solution.

Requires 4 routines,

count input pulse width
see if input changed
decrement output count
see if time to change output


COUNT INPUT PULSE WIDTH

In order to get the increase in frequency, the
input count must be reduced before it becomes the
count for the output.  This is done by not
counting the input pulse every forth time.

The 'fourth input counter' will add a count to the
input count to 'tweak it from 125% to 130% every
13th time it is called.  The 52 (4*13) input
timings results in 39 (3*13) input counts, and if
1 input count is added at this time, the
percentage of 40 counts to 52 timings is 130%.

SEE IF INPUT CHANGES

When the input state changes, the input count is
moved to the 'last pulse count' and the input
pulse count is cleared. It may be a good idea to
average the last pulse count and input pulse
instead of just moving it.  This is easily done by
adding the two and right shifting the results.
This averaging will encourage a 50% duty cycle for
the output pulses.

DECREMENT OUTPUT COUNT

Just subtract one from output count.

SEE IF TIME TO CHANGE OUTPUT

if output count is zero, toggle output pulse and
move 'last pulse count' to output count

So there would be three series of
count input pulse width
see if input changed
decrement output count
see if time to change output

And a fourth series with the 'count input pulse
width' modified to only counting every 13th time.

One main concept is that the input pulse and
output pulse have no relationship in time except
the 'last pulse count', and that count can change
any time with the output routine using it when it
toggles the output pulse and starts a new pulse.

Bill


{Original Message removed}

2003\04\29@025929 by chta Bretislav

flavicon
face
The better way is to add 10 to input count and subtract 13 from output
count. When output count underflow, toggle output pulse and ADD 'last pulse
count' to output count.
This approach don't need any further correction and allow you to easy change
ratio of input and output frequency by changing only 2 constants.
Run sequence on interrupt from timer to get constant sampling frequency
which is in your case higher than 2*4000*13/10 Hz
and lower than 2*200*65536/10 Hz (for 2-Byte counters)

Breta

-----Ursprungligt meddelande-----
Från: Bill & Pookie [.....williamcornutt111spam_OUTspamATTBI.COM]
Skickat: måndag 28 april 2003 16:05
Till: TakeThisOuTPICLIST.....spamTakeThisOuTMITVMA.MIT.EDU
Ämne: Re: [PIC]: Frequency multiplier?


Looking at the question as inputting a signal with
a 50% duty cycle and outputting a signal 130%
greater with a 50% duty cycle, here is my
solution.

Requires 4 routines,

count input pulse width
see if input changed
decrement output count
see if time to change output


COUNT INPUT PULSE WIDTH

In order to get the increase in frequency, the
input count must be reduced before it becomes the
count for the output.  This is done by not
counting the input pulse every forth time.

The 'fourth input counter' will add a count to the
input count to 'tweak it from 125% to 130% every
13th time it is called.  The 52 (4*13) input
timings results in 39 (3*13) input counts, and if
1 input count is added at this time, the
percentage of 40 counts to 52 timings is 130%.

SEE IF INPUT CHANGES

When the input state changes, the input count is
moved to the 'last pulse count' and the input
pulse count is cleared. It may be a good idea to
average the last pulse count and input pulse
instead of just moving it.  This is easily done by
adding the two and right shifting the results.
This averaging will encourage a 50% duty cycle for
the output pulses.

DECREMENT OUTPUT COUNT

Just subtract one from output count.

SEE IF TIME TO CHANGE OUTPUT

if output count is zero, toggle output pulse and
move 'last pulse count' to output count

So there would be three series of
count input pulse width
see if input changed
decrement output count
see if time to change output

And a fourth series with the 'count input pulse
width' modified to only counting every 13th time.

One main concept is that the input pulse and
output pulse have no relationship in time except
the 'last pulse count', and that count can change
any time with the output routine using it when it
toggles the output pulse and starts a new pulse.

Bill


{Original Message removed}

2003\04\29@065937 by Bill & Pookie

picon face
Great, very simple, very good.

Bill

----- Original Message -----
From: "Rychta Bretislav"
<TakeThisOuTBretislavRychtaKILLspamspamspamALVISHAGGLUNDS.SE>
To: <.....PICLISTspamRemoveMEMITVMA.MIT.EDU>
Sent: Monday, April 28, 2003 11:48 PM
Subject: SV: [PIC]: Frequency multiplier?


The better way is to add 10 to input count and
subtract 13 from output
count. When output count underflow, toggle output
pulse and ADD 'last pulse
count' to output count.
This approach don't need any further correction
and allow you to easy change
ratio of input and output frequency by changing
only 2 constants.
Run sequence on interrupt from timer to get
constant sampling frequency
which is in your case higher than 2*4000*13/10 Hz
and lower than 2*200*65536/10 Hz (for 2-Byte
counters)

Breta

-----Ursprungligt meddelande-----
Fren: Bill & Pookie
[RemoveMEwilliamcornutt111spamspamBeGoneATTBI.COM]
Skickat: mendag 28 april 2003 16:05
Till: spamBeGonePICLIST@spam@spamspam_OUTMITVMA.MIT.EDU
Dmne: Re: [PIC]: Frequency multiplier?


Looking at the question as inputting a signal with
a 50% duty cycle and outputting a signal 130%
greater with a 50% duty cycle, here is my
solution.

Requires 4 routines,

count input pulse width
see if input changed
decrement output count
see if time to change output


COUNT INPUT PULSE WIDTH

In order to get the increase in frequency, the
input count must be reduced before it becomes the
count for the output.  This is done by not
counting the input pulse every forth time.

The 'fourth input counter' will add a count to the
input count to 'tweak it from 125% to 130% every
13th time it is called.  The 52 (4*13) input
timings results in 39 (3*13) input counts, and if
1 input count is added at this time, the
percentage of 40 counts to 52 timings is 130%.

SEE IF INPUT CHANGES

When the input state changes, the input count is
moved to the 'last pulse count' and the input
pulse count is cleared. It may be a good idea to
average the last pulse count and input pulse
instead of just moving it.  This is easily done by
adding the two and right shifting the results.
This averaging will encourage a 50% duty cycle for
the output pulses.

DECREMENT OUTPUT COUNT

Just subtract one from output count.

SEE IF TIME TO CHANGE OUTPUT

if output count is zero, toggle output pulse and
move 'last pulse count' to output count

So there would be three series of
count input pulse width
see if input changed
decrement output count
see if time to change output

And a fourth series with the 'count input pulse
width' modified to only counting every 13th time.

One main concept is that the input pulse and
output pulse have no relationship in time except
the 'last pulse count', and that count can change
any time with the output routine using it when it
toggles the output pulse and starts a new pulse.

Bill


----- Original Message -----
From: "Gary Neal" <TakeThisOuTgln103spamspamPSU.EDU>
To: <PICLISTEraseMEspamMITVMA.MIT.EDU>
Sent: Wednesday, April 23, 2003 6:08 PM
Subject: [PIC]: Frequency multiplier?


> Hi,
>
> I've got a variable frequency signal (200hz to
4khz) whose frequency I want
> to increase by 30% (5v signal).  IE if the input
frequency is 1000hz, I
> want to output 1300hz.  Is there an easy method
of doing this?  I've heard
> of PLL, but don't have a clue how to build them,
so if there's an easier
> option that would be great.
>
> Thanks,
>
> Gary
>
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2003\04\29@082526 by Reinaldo Alvares

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What if the duty cycle is not 50%, and say variable?
RA
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Sent: Tuesday, April 29, 2003 12:57 PM
Subject: Re: [PIC]: Frequency multiplier?


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2003\04\29@104050 by chta Bretislav

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Then add only 5 and move the input count to the 'last pulse count' only on
rising (or only on falling) edge of the input signal.

Breta

-----Ursprungligt meddelande-----
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Ämne: Re: [PIC]: Frequency multiplier?


What if the duty cycle is not 50%, and say variable?
RA
{Original Message removed}

2003\04\29@121110 by Scott Dattalo

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On Tue, 29 Apr 2003, Reinaldo Alvares wrote:

> What if the duty cycle is not 50%, and say variable?

Any square wave can be made into a 50% duty cycle by dividing by 2. In
other words, just watch the rising (or falling) edge. Brata's approach
still works. This is just another example of a phase accumulator.

I haven't been monitoring this thread too closely, but the easiest way to
solve this problem for a single channel is to utilize the PIC's input
capture and timer 2 outputs. For example, configure TMR1 to capture all
rising edges and PR2 to specify TMR2's period. The value stuffed in PR2 is
simply multiplicative (and possibly filtered) factor of the capture
interval. The fact that someone hasn't suggested this solution implies
that either this is for a PIC without these peripherals or there is more
than one channel. [but after reading the original poster's request, it
appears that only one channel is required -- so maybe there's another
reason.]

One way to do this in software is like so:

In the (high frequency) interrupt routine:

 CurrentState = IOPort();
 rising_edge  = (CurrentState ^ LastState) & CurrentState;
 LastState    = CurrentState;

 if(rising_edge & BIT_n) {
   rollover = rising_edge_counter;
   rising_edge_counter = 0;
 } else
   rising_edge_counter++;


 if(freq_out == 0) {
   toggle_output();
   freq_out = Fout_half_period;
 } else
   freq_out--;

And in the main loop:

  if (rollover) {
    Fout_update_period();
    rollover = 0;
  }


Where Fout_update_period() scales the period of the output clock to be
a multiplicative factor of the input clock. Or more specifically, the
periods are scaled.

This rather verbose approach is easily scalable to multiple channels.

To monitor the rising edges and control the scaled frequency outputs, then
something like this would suitable for a high frequency interrupt (e.g.
tmr0 rollovers):

   movf   Input_PORT,W      ;Read the current
   xorwf  LastState,W       ;compare to the last
   xorwf  LastState,F       ;Save current as last
   andwf  LastState,W       ;Get the rising edges.

   movwf  temp              ;
   iorwf  rollovers,F       ;Let the main loop know

 ; before processing the rollovers,
 ; generate the outputs (this way you'll be less susceptible to
 ; the jitter incurred with the non-isochronous code that processes
 ; the rising edges.)

   clrf   FoutToggle        ; assume that the outputs aren't
                            ;  going to change

   movf   Fout0_period,W    ;Get the (half) period in case we roll
   decf   Fout0_ctr,F       ;Toggle when this reaches zero
                            ;Check the rollovers - use btf's instead
   skpnz                    ;of goto's for isochronous execution.
    movwf Fout0_ctr         ;rolled over, so reset the counter
   skpnz                    ;
    bsf   FoutToggle,0      ;and set this bit for below


  ... same for other outputs

 ; now update the outputs

   movf   FoutToggle,W
   xorwf  Fout,W
   movwf  Fout
   movwf  Output_PORT

 ; now process the rising edges.


ch0:
   incf   Ch0_ctr           ;Assume rising edge did not occur
   btfsc  temp,0
    goto  re0               ;Handle the rising edge

ch1:
   ...

chn:
   ...




   return  ; or interrupt exit code


re0:
   decf   Ch0_ctr,W         ;
   movwf  Ch0_period
   clrf   Ch0_ctr

   goto  Ch1

re1:
   ...


------------

In the main loop, ch0_period and when it becomes non-zero, update the
Fout0_period. Again, this is just a detailed explanation of the phase
accumulator alogrithm proposed by Breta.

Scott

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2003\04\29@125856 by Tim Webb

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This may not help much at low frequencies, but at high frequencies you can send your signal into an amplifier that is being overdriven, this should create many harmonics.

Then use a tracking band pass filter to filter out all frequencies other than the required harmonic.  This way you can make a frequency divider or multiplier.

The tracking filter may be the biggest challenge



{Original Message removed}

2003\04\30@015928 by Reinaldo Alvares

picon face
Thanks to all for your answers to my 50% stuff question.
I perhaps didn't explain myself properly or didn't understand your answer
correctly.
Let me please rephrase my question. Let's say I want to multiply the
frequency of an input square wave by some factor "F".Consider a sensor
giving pulses from a rotating shaft, if the shaft accelerates then two
consecutive periods are different. Every next period will be shorter than
the previous one. Now if I divide the first period "P" by "F" and output an
"F" amount of pulses with periods equal to "P/F" then the PIC will still be
outputting pulses while the next period is already happening. I can't loose
counts since I need this for positioning, direction and speed measurement
purposes. I have to watch both edges for any change in the direction of the
shaft.The sensor is a quadrature encoder with only A and B outputs, no Z. I
have to output two channels out of phase by ~90% to the system processing
the data.The phase difference is naturally the same as the incoming pulse. I
have managed to do it for a fixed or slow variable frequency.I implemented
it in software on an 16F84A, I know they are outdated, but I have lots of
them!. When the shaft accelerates fast then I start to miss about 3 to 10%
of the pulses depending on the acceleration, getting offsets in
position.When the shaft is slowing down then is ok because the next period
will be longer. There will be space enough in time to accommodate the
multiplied pulses before the next ones will have to be outputted. I might be
missing something here, I don't know what a phase accumulator is but I'll
try to find out. It looks to me that this task is just not possible to fix
on a base of period by period multiplication. I appreciate very much any
advise or pointer to how to solve this. And sorry for taking this thread, I
didn't mean to.
Best regards
RA
{Original Message removed}

2003\04\30@020932 by Ben Jackson

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face
On Wed, Apr 30, 2003 at 08:00:44AM +0200, Reinaldo Alvares wrote:
> Let me please rephrase my question. Let's say I want to multiply the
> frequency of an input square wave by some factor "F". [...]
> I can't loose
> counts since I need this for positioning, direction and speed measurement

You do realize that there ain't no such thing as a free lunch.  Just
increasing the frequency by a factor of F doesn't give you any more
information at all.  It's not like having an encoder F times more
sensitive.  The best you can hope for is that by perfect oversampling
you get exactly the same amount of information out.  Any error you
introduce gives you less net information.

--
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<benEraseMEspam@spam@ben.com>
http://www.ben.com/

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2003\04\30@022623 by Reinaldo Alvares

picon face
Yes, I do realize that. But the pulses are also used for triggering purposes
and that's where they are too few for. That's actually why they need to be
multiply, otherwise ok. I didn't understand quite well the oversampling
stuff, I do not use ADCs for this. I agree with you that I get the same
amount of information out, that holds true for an steady rotation of the
shaft. The resolution of the encoder will not be increased by multiplying by
anything of course, but I do get more triggers evenly spaced for each
incoming pulse (unfortunally for fixed frequencies only).
Best regards
RA
{Original Message removed}

2003\04\30@025233 by erholm (QAC)

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Maybe a gearbox on the shaft to the encoder so you
actualy gets *more* pulses for the same movment ?
Jan-Erik Soderholm

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2003\04\30@025856 by Reinaldo Alvares

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No space for that, unfortunally.
RA
----- Original Message -----
From: "Jan-erik Soderholm (QAC)" <Jan-erik.Soderholmspam_OUTspam@spam@PAC.ERICSSON.SE>
To: <spamBeGonePICLIST@spam@spamMITVMA.MIT.EDU>
Sent: Wednesday, April 30, 2003 8:51 AM
Subject: Re: [PIC]: Frequency multiplier?


> Maybe a gearbox on the shaft to the encoder so you
> actualy gets *more* pulses for the same movment ?
> Jan-Erik Soderholm
>
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'SPAM: Re: [PIC]: Frequency multiplier?'
2003\04\30@031901 by Picdude

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Couple Q's...

- Does duty-cycle matter?
- What is the range of the input freq?
- Is the multiplier a fixed value?


Cheers,
-Neil.



On Wednesday 30 April 2003 01:00, Reinaldo Alvares scribbled:
{Quote hidden}

> {Original Message removed}

'[PIC]: Frequency multiplier?'
2003\04\30@034545 by Alan B. Pearce

face picon face
>I implemented it in software on an 16F84A, I know they are
>outdated, but I have lots of them!. When the shaft accelerates
>fast then I start to miss about 3 to 10% of the pulses
>depending on the acceleration, getting offsets in position.

I suspect that using any micro is going to cause you problems. I think you
may have to resort to something like Direct Digital Synthesis, or a proper
phase lock loop system as a minimum. Whatever you do there will be a time
lag between the encoder speeding up and your multiplied output catching up,
as the multiplier cannot predict when the next edge is going to occur that
it will need to measure.

Your other problem is going to occur with the lowest rotation rate of the
encoder that you wish to lock to. I cannot recall you stating this, but I
seriously doubt you will be able to go right down to 0 rpm, and I get the
feeling that is what you want to do.

When you refer to offsets in position, are you trying to make an x-y plotter
or something similar? It seems to me that what you really need to do is get
an encoder that has more steps per revolution. Your only other way to option
that I can think of is to remove the encoder from its current connection,
and have a suitable gearbox between it and the drive shaft to increase the
shaft speed into the encoder. One of these two solutions is going to be the
only way you will get a satisfactory low speed performance.

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'SPAM: Re: [PIC]: Frequency multiplier?'
2003\04\30@035012 by Reinaldo Alvares

picon face
-No, the duty cycle doesn't matter as long as the outputed pulses are evenly
spaced.
-The range of the input frequency is from 0Hz(stop condition) to 1kHz(max
speed).
-Yes, the multiplier is always the same 10.
Thanks for your reply
RA
{Original Message removed}

2003\04\30@041309 by Picdude

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face
Okay, I'm confusing threads here, because I thought there was something about a 30% increase some days ago.   But let's work with 10x ...

Possible solution 1: (I can't see why this solution would cause you problems, but you will have jitter) -- monitor input, and on each rising edge, dump out 10 output pulses as fast as the circuitry connected to the output will handle it.  This needs to be at least 10 khz, so that at max frequency, the output is done before the next incoming edge.  That's it.

Possible solution 2:  Whatever you are doing now (where you're losing pulses during input acceleration), you should monitor the input and *queue* the output pulses so that none is lost.  With the first incoming pulse, put the number 10 in an output queue.  The output routine (cycle) will monitor this number and dump an output pulse when this number is greater than zero and then decrement this number.   If it only gets to output say 8 pulses before the next input pulse comes in (because the input rate increased), then just *add* the newest number of output pulses to what's already been scheduled.  IE: add 10 to the remaining 2.  Again, you will have all the output pulses, but with some jitter.  With some intelligent coding, you can accelerate the output a bit more than necessary to catch up to real-time.

Cheers,
-Neil.



On Wednesday 30 April 2003 02:50, Reinaldo Alvares scribbled:
> -No, the duty cycle doesn't matter as long as the outputed pulses are
> evenly spaced.
> -The range of the input frequency is from 0Hz(stop condition) to 1kHz(max
> speed).
> -Yes, the multiplier is always the same 10.
> Thanks for your reply
> RA
> {Original Message removed}

'[PIC]: Frequency multiplier?'
2003\04\30@042139 by Reinaldo Alvares

picon face
----- Original Message -----
From: "Alan B. Pearce" <A.B.Pearcespam@spam@RL.AC.UK>
To: <EraseMEPICLISTRemoveMEspamSTOPspamMITVMA.MIT.EDU>
Sent: Wednesday, April 30, 2003 9:45 AM
Subject: Re: [PIC]: Frequency multiplier?


> >I implemented it in software on an 16F84A, I know they are
> >outdated, but I have lots of them!. When the shaft accelerates
> >fast then I start to miss about 3 to 10% of the pulses
> >depending on the acceleration, getting offsets in position.
>
> I suspect that using any micro is going to cause you problems. I think you
> may have to resort to something like Direct Digital Synthesis, or a proper
> phase lock loop system as a minimum. Whatever you do there will be a time
> lag between the encoder speeding up and your multiplied output catching
up,
> as the multiplier cannot predict when the next edge is going to occur that
> it will need to measure.
That's exactly what I thought until I saw the post here about multiplying a
frequency with a PIC.
Perhaps it's because the input frequency was fixed and didn't matter a few
periods lost for adjustments. Perhaps I missunderstood the whole thing; but
I had to ask, this is why this list is for after all. Using DDS was not an
option because of the price of those.
>
> Your other problem is going to occur with the lowest rotation rate of the
> encoder that you wish to lock to. I cannot recall you stating this, but I
> seriously doubt you will be able to go right down to 0 rpm, and I get the
> feeling that is what you want to do.
You're right again. The minimum was 0 rpm, and yes I did had to use a time
out for that. Otherwise the output pulses would have been way too long.
>
> When you refer to offsets in position, are you trying to make an x-y
plotter
> or something similar? It seems to me that what you really need to do is
get
> an encoder that has more steps per revolution. Your only other way to
option
> that I can think of is to remove the encoder from its current connection,
> and have a suitable gearbox between it and the drive shaft to increase the
> shaft speed into the encoder. One of these two solutions is going to be
the
> only way you will get a satisfactory low speed performance.

No is not an x-y plotter.The encoder is on a moving cart with a scanning
system on it. The pulses are used to trigger one scan per pulse. The encoder
is connected to the shaft of one of the wheels. I used magnets placed on the
wheel to trigger an Allegro hall effect sensor with quadrature output.
Because of the size of the wheel I could not mount more magnets on it. I
used the smallest ones I could found 1mm diameter. The magnets were used
because this equipment goes into water, dust and many other tough
conditions, where optical systems are difficult to implement. So the end was
to get an E4 encoder from USdigital and get a rugged case for it. The whole
construction is a cylinder 120mm long and 29mm diameter and solved all the
problems. I spent quite a while trying to do the trick with a micro, that's
why I was interested in some opinions regarding this. I guess from the
beginning it was a doomed project. Anyway, I always try to listen to other
people because one can never learn to much.
Thanks a lot for your time.
RA
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2003\04\30@043008 by hael Rigby-Jones

picon face
{Quote hidden}

Perhaps consider a reluctance sensor, as used on engine managment systems
for engine position sensing?  This way all you need on the rotating part is
a ferrous toothed wheel which should give you considerably better
resolution.  You can use two reluctance sensors to give a quadrature output
if needed.

Regards

Mike


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2003\04\30@103102 by Scott Dattalo

face
flavicon
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On Wed, 30 Apr 2003, Reinaldo Alvares wrote:

{Quote hidden}

Okay. There are two pieces of information that are being manipulated.
There's the frequency *and* there's the pulse width. The phase accumulator
approach can still be made to work. The job would be *so* much easier to
accomplish with a better endowed PIC than the lowly f84...

1) Measure the input period, i.e. time between rising edges
2) Measure the input pulse width, i.e. time between a rising and falling
edge.
3) Scale the input period and input frequency to produce the output period
and frequency.

The hard part (with an f84) is sampling the signals fast enough. Here are
some snippets to help:

Edge detector:

    movf   IOPORT,w         ;sample the incoming signal
    xorwf  last_sample,w    ;compare to the last sample
    andlw  IOBIT            ;
    skpnz                   ;If they're the same then no need to
     goto  no_change        ;process

    xorwf  last_sample,f    ;Save this sample for next time
    andwf  last_sample,W    ;Is this a rising edge?
    skpnz
     goto  falling_edge
rising_edge:
    ...

    goto   no_change

falling_edge:
    ...

no_change:

------------------

Now to generate the scaled pulse output, I'd use phase shifted counters:

http://www.dattalo.com/technical/theory/pwm.html

The periods of the rising and falling edge counters are the same and equal
the scaled frequency output. The relative phase shift corresponds to the
desired pulse width. See

http://www.dattalo.com/technical/software/pic/pwm8.asm

for example of 8 parallel PWM outputs that use this technique. For a
single channel, there several optimizations one could make.

Scott

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2003\04\30@152746 by Bill & Pookie

picon face
If duty cycle is not 50%, then have two 'last
pulse counts'.  one for high and one for low.  And
use  Breta's 10/13 method to increase frequency.

And Garry, it seems like you are describing your
solution to your problem rather than what the
problem is.  If you receive data and transmit it
at a faster rate you will be sending data you have
not yet received.

Bill

{Original Message removed}


'[PIC]: Frequency multiplier?'
2003\05\02@013750 by Reinaldo Alvares
picon face
Thanks to everyone for your suggestions, very interesting and educational.
I'll give a try to this problem again to see if I can get any useful
results. As Alan B. Percy and Ben Jackson pointed out there's always going
to be some error in the output pulses. The question is, whether I can get
the error to be low or not. I think some 1 to 3% would be ok, so I'll try
the suggestions from Picdude and Scott Dattalo and see what's going to
happen. And sorry for my late reply, here in Sweden yesterday was a free day
at work.
Best regards
RA
{Original Message removed}

2003\05\02@025121 by Picdude

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face
Reinaldo,

One on-the-side question ... I remember you stating that this was on a cart of some type with a 29mm diameter wheel, and one sensor on the wheel.  You also mentioned 1khz max input rate.  29mm dia ~= 91mm circumference.  At 1000 khz with one sensor (which means 1000 rpm), this means 91000 mm per sec, or approx 328 km per hour...!?

Are you sure that the assumptions are realistic?   Having a buffer is a great idea, but this may be pushing it a bit I think.  Either I messed up with the math, read something wrong, am assuming something incorrect, or ... ?

Cheers,
-Neil.



On Friday 02 May 2003 00:38, Reinaldo Alvares scribbled:
> Thanks to everyone for your suggestions, very interesting and educational.
> I'll give a try to this problem again to see if I can get any useful
> results. As Alan B. Percy and Ben Jackson pointed out there's always going
> to be some error in the output pulses. The question is, whether I can get
> the error to be low or not. I think some 1 to 3% would be ok, so I'll try
> the suggestions from Picdude and Scott Dattalo and see what's going to
> happen. And sorry for my late reply, here in Sweden yesterday was a free
> day at work.
> Best regards
> RA
> {Original Message removed}

2003\05\02@070202 by Reinaldo Alvares

picon face
Neil,
No, the new encoder I'm using now is an E4 from USdigital an is *enclosed*
in a cylinder of *29mm of diameter*. The wheel of the cart is 1.05m in
circumference. The wheel had 90 magnets around a plate located on the cart's
rear axis in front of the hall effect sensor. The cart is capable to go with
a max speed of 20km/h or 5.55m/s, 5.55*90 = 499.5 pulses/s or ~0.5kHz.
Perhaps you're right and I left too much for the worse case design. I think
25% over the limit would be enough and a top of 625Hz is more appropriate.
Thank you for taking your time. I'll post back if I can get something out of
all these ideas and suggestions.
Best regards
RA
{Original Message removed}

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