Searching \ for ' PIC: Use of SS in slave mode.' in subject line. ()
Make payments with PayPal - it's fast, free and secure! Help us get a faster server
FAQ page: www.piclist.com/techref/microchip/devices.htm?key=pic
Search entire site for: 'Use of SS in slave mode.'.

No exact or substring matches. trying for part
PICList Thread
'[PICLIST] PIC: Use of SS in slave mode.'
2000\07\27@165802 by Galen O'Grady

flavicon
face
I am using a 16C63 as an SPI slave (with SS* enabled).

When doing multi-byte transfers, does the SS* pin need to be cycled (by
the master) after each byte, or can it remain low for the entire
transfer?

Regards.
============================
Galen O'Grady C.E.T.
Research & Development
Reliable Scale Corporation
520 Moraine Road N.E.
Calgary, AB, Canada T2A 2P2
Tel:(403)272-8784
Fax:(403)273-9818
spam_OUTogradygTakeThisOuTspamreliablescale.com
http://www.reliablescale.com
============================

--
http://www.piclist.com hint: The PICList is archived three different
ways.  See http://www.piclist.com/#archives for details.

2000\07\28@075419 by David Kott

flavicon
face
> I am using a 16C63 as an SPI slave (with SS* enabled).
>
> When doing multi-byte transfers, does the SS* pin need to be cycled (by
> the master) after each byte, or can it remain low for the entire
> transfer?
>
> Regards.
> ============================
> Galen O'Grady C.E.T.
> Research & Development


No.  You do not need to cycle it between each byte transfer.  To wit, to
test this notion, setup your SPI in slave mode with SS control enabled, and
ground the SS line.  The SPI will function identically, provided you are
transferring 8 bits per word (as you implied when you described the data as
a "byte")

Recently, I was having an issue with my SPI Slave code.  I had SS control
enabled.  However, it seems that the device sourcing the SS signal was not
conforming to the timing requirements for the PIC.  Merely grounding the SS
line allowed the SPI subsystem to function properly.  Subsequently, I
configured my SPI to not use SS control.

The PICmicro Mid-Range MCU Family manual says this:

"When the SPI is in Slave Mode with SS pin control enabled, (SSPCON<3:0> =
0100) the SPI
module will reset if the SS pin is set to VDD. If the SPI is used in Slave
Mode with the CKE bit is
set, then the SS pin control must be enabled.
When the SPI module resets, the bit counter is forced to 0. This can be done
by either by forcing
the SS pin to a high level or clearing the SSPEN bit..." (c) Microchip
Technology Inc.

-d

--
http://www.piclist.com hint: To leave the PICList
.....piclist-unsubscribe-requestKILLspamspam@spam@mitvma.mit.edu>

More... (looser matching)
- Last day of these posts
- In 2000 , 2001 only
- Today
- New search...