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'[PIC] Shameless request for technical assistance'
2011\12\15@020348 by bladetooth

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Normally, I?d prefer to just let the company responsible handle these sorts of questions, but Microchip?s support responses seem to be pretty lacking, to put it politely, and I?m trying to decide on a chip soon enough that I can potentially use a few extra in some holiday gifts. Any suggestions for an affordable gift-worthy project would be appreciated. :)


Digikey seems to think PIC18LFK22-E/P and PIC18LFK22-I/P have different maximum processing speeds, and not just different temperature ranges. Is their database entry simply wrong, or is there something I?m not finding on Microchip?s data sheet?


In 80437F.pdf, the errata for the PIC18LFK22, Item 4.5 mentions that, while using I2C, the RCEN bit not being cleared when an ?Improper Stop? is received. I can find nothing anywhere about what this is, or in what circumstances it would ever happen; there?s certainly nothing in the I2C specification about what an ?Improper Stop? is. I?m particularly concerned because I intend to use I2C in Multi-Master mode, and by all appearances, very few PICs get Multi-Master done correctly in hardware, where it is supposed to be done.


In 41214A.pdf, ?CCP and ECCP Tips ?n Tricks? (a good beginner?s guide to the ECCP), TIP #6 mentions using the comparator together with the ECCP. What isn?t exactly clear is whether the connection from the comparator to the ECCP is supposed to be internal or external to the PIC. I can see a valid implementation both ways, though in this case I would guess that it?s external..


Can one ECCP unit simultaneously receive one PWM input and generate a separate, unrelated PWM output? I want to read a bar code, and I?m curious whether I can generate a pulse pattern to distinguish legitimate reflectance from background noise with just one ECCP.




Ryan Pettigre

2011\12\15@045656 by cdb

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On Thu, 15 Dec 2011 01:03:47 -0600 (CST), spam_OUTbladetoothTakeThisOuTspamverizon.net wrote:
:: Digikey seems to think PIC18LFK22-E/P and PIC18LFK22-I/P have
:: different maximum processing speeds, and not just different
:: temperature ranges.

This is correct, not only is there a temperature range difference, but also a maximum frequency (don't forget higher temperature means speed must be slower if cooling of some kind isn't catered for). On page 328 of the data sheet (http://ww1.microchip.com/downloads/en/DeviceDoc/41365E.pdf), you'll see the Voltage versus frequency graph, this states the extended version has a maximum frequency of 48MHz against the standard ranges' part of 64
MHz.

::In 80437F.pdf, the errata for the PIC18LFK22, Item 4.5 mentions that, ::while using I2C, the RCEN bit not being cleared when an ?Improper Stop?

I haven't looked at that particular errata sheet, but the one for the 18K23 might have better grammar (http://ww1.microchip.com/downloads/en/DeviceDoc/80469D.pdf), this refers to 'Improper handling of a Stop event", and their explanation of this is

"8. Module: MSSP (Master I2C? mode)
In Master I2C Receive mode, if a Stop condition
occurs in the middle of an address or data
reception, then the SCL clock stream will continue
endlessly and the RCEN bit of the SSPCON2
register will remain set improperly. When a Start
condition occurs after the improper Stop condition,
then 9 additional clocks will be generated followed
by the RCEN bit going low.
Work around
Use low-impedance pull-ups on the SDA line to
reduce the possibility of noise glitches, which may
trigger an improper Stop event. Use a time-out
event timer to detect the unexpected Stop condition
and resulting stuck RCEN bit. Clear stuck 8. Module: MSSP (Master I2C? mode)
In Master I2C Receive mode, if a Stop condition
occurs in the middle of an address or data
reception, then the SCL clock stream will continue
endlessly and the RCEN bit of the SSPCON2
register will remain set improperly. When a Start
condition occurs after the improper Stop condition,
then 9 additional clocks will be generated followed
by the RCEN bit going low.
Work around
Use low-impedance pull-ups on the SDA line to
reduce the possibility of noise glitches, which may
trigger an improper Stop event. Use a time-out
event timer to detect the unexpected Stop condition
and resulting stuck RCEN bit. Clear stuck "

I'll leave others to think about your last two questions.

Colin


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cdb, .....colinKILLspamspam@spam@btech-online.co.uk on 15/12/2011
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2011\12\16@043119 by cdb

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You sent a supplementary question direct to me. Verizon bounced the reply back to me - so here is my reply to your question on whether multimastered I2C can cause the stop problem noted in the datasheet.

"I've never used multi-master arbitration, but basically if more than one
master tries to transmit at the same time during the address phase of one
of them, a stop could be assumed by one of the masters causing the problem
stated in the data sheet.

I think you are only going to know by either finding someone else who has
done this or by experimentation."

Colin
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cdb, colinspamKILLspambtech-online.co.uk on 16/12/2011
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