>Stephen D. Barnes wrote:
>
>
>>>Just to pipe up, I don't know if I was the one you were talking to (I
>>>did email you a couple things), but I did get my Warp13 working with
>>>the 2011. Worked quite well too, once I added the Olin "cap and
>>>resistor" thing.
>>>
>>>Of course, shortly after I got it working I received an ICD2 (which
>>>also required the "cap and resistor" thing). I'm not sure I'd
>>>consider having an ICD a REQUIREMENT of using the dsPIC, but it sure
>>>does make life easier.
>>>
>>>
>>I have done some searching and cannot find out what this "cap and
>>resistor" thing is.
>>anyone care to elaborate or post a link?
>>
>>
>
>Programming is done with two digital lines called PGC (clock) and PGD
>(data). These lines are right next to each other in the standard Microchip
>programming cable with RJ-12 plugs on each end.
>
>The problem comes from edges on one of these lines coupling onto the other.
>Since the programmer always drives the PGC line, this can be handled in the
>programmer by a little filtering. However, during readback the target chip
>drives the PGD line. Sharp eges on that can and do couple onto the PGC
>line, especially when a dsPIC is driving the line, probably because these
>have faster output drivers. The noise coupled from PGD to PGC looks like
>extra clocks at the target chip, which cause the programmer and target to
>get out of sync and communication to break down. Unfortunately, the whole
>effect can happen within the propagation time from the target chip to the
>programmer and back (I estimate about 7nS), so there is absolutely nothing
>that can be done at the programmer end to fix this.
>
>My solution is to add a 22pF cap to ground on each of the PGC and PGD lines
>on the target board. I also add a 100ohm resistor in the PGD line between
>the target chip and the cap. The resistor and cap on the PGD line form a
>low pass filter that removes attenuates high frequencies (from the sudden
>edges) going onto the PGD line when driven by the target. The cap on the
>PGC line makes it less susceptible to coupled noise.
>
>In practise, just a 22pF cap on PGD right at the target PIC fixes the
>problem most of the time. I've never seen it fail with a 22pF cap on both
>lines, but I add the resistor to target boards just to make sure. I've been
>doing this for over a year now, and all such target boards can be reliably
>programmed and debugged using the ICSP interface.
>
>
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>
>