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'[PIC] 18f452 and PWM'
2005\02\27@181312 by Jason Graham

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Hi all,

I was wondering if anyone knows if both PWM's on a PIC 18f452 can be used
simultaneously? I know that the frequency and period have to be the same,
but i need to vary the duty cycles on each. That is, one (CCP1) is
controlling the variable speed of a DC drive motor (varying duty cycles),
whereas the other (CCP2) needs to control a DC motor that also needs a
varying duty cycle. Both at the same time. I have been trying to get it to
work but it seems to only control one at a time.

Thanks
Jason


2005\02\27@185740 by piclist

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On Sun, 27 Feb 2005, Jason Graham wrote:

> I was wondering if anyone knows if both PWM's on a PIC 18f452 can be used
> simultaneously?

Yes.

> I know that the frequency and period have to be the same,

Correct.

> i need to vary the duty cycles on each. That is, one (CCP1) is controlling
> the variable speed of a DC drive motor (varying duty cycles), whereas the
> other (CCP2) needs to control a DC motor that also needs a varying duty
> cycle. Both at the same time. I have been trying to get it to work but it
> seems to only control one at a time.

Show how you've set up the CCPxCON and CCPRx registers.

--
John W. Temples, III

2005\02\27@210122 by Jason Graham

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>>Show how you've set up the CCPxCON and CCPRx registers.


Using Pic Basic Pro el crappo....

DEFINE        HPWM2_TIMER 2 ' timer 2 select
DEFINE        CCP1_REG        PORTC
DEFINE        CCP1_BIT        2

DEFINE        HPWM1_TIMER        2
DEFINE        CCP2_REG        PORTB
DEFINE        CCP_BIT 3


and initialization registers

CCP1CON = %00001100  'PWM mode
CCP2CON = %00001100  'PWM mode

__________________________________________________
the following applies to change the duty cycle and output pulse

HPWM 1,255,2000

Jason


2005\02\28@001346 by Bruce

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HPWM uses the *hardware* PWM module. It will not work
on RB3.

DEFINE HPWM2_TIMER 2
DEFINE CCP1_REG PORTC
DEFINE CCP1_BIT 2   ' RC2/CCP1

DEFINE HPWM1_TIMER 2
DEFINE CCP2_REG PORTC
DEFINE CCP_BIT 1    ' RC1/CCP2

TRISC.1=0
TRISC.2=0

CCP1CON = %00001100  'PWM mode
CCP2CON = %00001100  'PWM mode

HPWM 1,55,2000    ' RC2/CCP1 = 2kHz @ 50% duty
HPWM 2,127,2000   ' RC1/CCP2 = 2kHz @ 21% duty
               ^_____ change this value to adjust duty cycles

-Bruce
http://www.rentron.com

{Quote hidden}

> --

2005\02\28@003103 by Bruce

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> HPWM 1,55,2000    ' RC2/CCP1 = 2kHz @ 50% duty
> HPWM 2,127,2000   ' RC1/CCP2 = 2kHz @ 21% duty
>                 ^_____ change this value to adjust duty cycles

Sorry. Should read;

HPWM 1,55,2000    ' RC2/CCP1 = 2kHz @ 21% duty
HPWM 2,127,2000   ' RC1/CCP2 = 2kHz @ 50% duty

-Bruce
http://www.rentron.com

2005\02\28@142613 by Antonis Iliopoulos

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I have all three working on mine,
there is the code:

;############################################################################
; Author :  Antonis Iliopoulos                     ;
; Date :      03 / 02 / 05                     ;
; Title:      3CCP                 ;
;                            ;
; Description: The following program was created to produce a PWM signal through the        ;
; all three CCP channel on RC2, rb3 and rb5 that will set the motors to a fixed position  by entering the appropriate value in CCPRxL  ;
;         ;
;############################################################################
       list    p=16f777
       include<p16f777.inc>
;------------------------------------------------------------
;internal oscillator at 4 MHz
;------------------------------------------------------------
duty equ 0x20
duty2 equ 0x23
duty3 equ 0x24
#define ccp1  portc,2
#define ccp2  portb,3
#define ccp3  portb,5
;ERRORLEVEL -302
     org     0x000

start
; bsf  status,rp0  
; bcf  status,rp1  ;switch to bank 1
 banksel OSCCON
 movlw b'01100000' ;Device is running from INTRC as a secondary system clock
       movwf   OSCCON  ; T1OSC is used for system clock at a stable frequency of 1MHz
 movlw b'00000000' ;Device is running from INTRC as a secondary system clock
    movwf   OSCtuNe  ; T1OSC is used for system clock at a stable frequency of 1MHz
 movlw b'00000000' ;with 1 set inputs and with 0 set outputs
 movwf   trisb^0x080 ; portB is all outputs
 bcf  trisc,2  ;We clear ccp1 pin to make it output reference: 14.5  
 bcf  status,rp0 ;bank0
 bcf  ccp1  ;we set the ccp1 pin low
 BANKSEL TRISC ;GO TO THE APPROPRIATE BANK
 bsf  status,rp0
 bcf  trisc,1  ;We clear ccp2 pin to make it output reference: 14.5  
 bcf  status,rp0 ;bank0
 bcf  ccp2  ;we set the ccp2 pin low
 bcf  trisb,5  ;We clear ccp1 pin to make it output reference: 14.5  
 bcf  ccp3  ;we set the ccp1 pin low
 bcf  status,rp0    
 bcf  intcon,7    ;disable global interrupts
 bcf  intcon,6    ;disable peripheral interrupts
 bsf  status,rp0  ;bank 1
 bcf  pie1,1 ;disable timer 2 interrupts
 bcf  pie1,2 ;disable ccp1 interrupts
 bcf  pie2,0
 bcf  pie2,1
 banksel pir1
 clrf pir1
 clrf pir2
 bcf  status,rp0 ;BANK 0
 clrf ccp1con     ;ccp1 module off
 clrf ccp2con     ;ccp2 module off
 banksel ccp3con
 clrf ccp3con     ;ccp3 module off
 bsf  status,rp0
 bcf  status,rp1    ;bank 1    
 movlw b'11111111' ;decimal 255 FOR MAX RES=10 BITS
 movwf pr2 ;load period register
 bcf  status,rp0
 bcf  status,rp1 ;bank 0
 
 bsf  ccp1con,5   ;clear bit 1 of duty cycle reg
 bcf  ccp1con,4   ;clear bit 0 of duty cycle reg - pwm
 movlw b'00101011' ;DUTY CYCLE
 movwf duty
 movwf ccpr1l ;bits 9-2 of duty cycle
 bsf  ccp2con,5   ;clear bit 1 of duty cycle reg
 bcf  ccp2con,4   ;clear bit 0 of duty cycle reg - pwm
 movlw b'10001010' ;DUTY CYCLE
 movwf duty2
 movwf ccpr2l ;bits 9-2 of duty cycle

 bsf  status,rp0
 bcf  status,rp1 ;bank 1
 bcf  ccp3con,5   ;clear bit 1 of duty cycle reg
 bcf  ccp3con,4   ;clear bit 0 of duty cycle reg - pwm
 movlw b'01001010' ;DUTY CYCLE
 movwf duty3
 banksel ccpr3l
 movwf ccpr3l ;bits 9-2 of duty cycle

 bcf  status,rp0
 bcf  status,rp1 ;bank 0
 movlw b'00000011'   ;prescaler = 0 to be 1, 1 to divide by 4, 1x for 16
 movwf t2con       ;   tmr2 off
 clrf tmr2 ;clear tmr2
 movlw b'00001100' ;ccp1 pwm mode, ccp1 module on
 movwf ccp1con
 movlw b'00001100' ;ccp1 pwm mode, ccp1 module on
 movwf ccp2con
 banksel ccp3con
 movlw b'00001100' ;ccp1 pwm mode, ccp1 module on
 movwf ccp3con
 banksel t2con
 bsf  t2con,2 ;tmr2 on
 errorlevel +302
 end

regards Antonis




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2005\02\28@160213 by Bruce
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The PBP 18F452.INC header file doesn't include the
CONFIG3H CCP2MX: CCP2 Mux bit so CCP2 defaults
to RC1.

Add this to your PBP 18F452.INC file or turn off CCP2
MUX with you programmers software before programming
the part.

__CONFIG    _CONFIG3H, _CCP2MX_OFF_3H

With CCP2MX off, RB3 will be the CCP2 input/output.

Then this should work for RB3.

DEFINE HPWM2_TIMER 2
DEFINE CCP2_REG PORTB
DEFINE CCP2_BIT 3

HPWM 2,127,2000 ' Output 2kHz on RB3 @ 50% duty

-Bruce
http://www.rentron.com



'[PIC] 18f452 and PWM'
2005\03\01@073402 by Jason Graham
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Hi Bruce

Thanks for the help

Jason


2005\03\01@073615 by Jason Graham

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Antonis

Thanks for the help

Jason


2005\03\07@080559 by Antonis Iliopoulos

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Not a problem - if you need any further help and I can assist, just e-mail me!!!
By the way waht is the project for?

Jason Graham <spam_OUTjgrahamcaTakeThisOuTspamhotmail.com> wrote:
Antonis

Thanks for the help

Jason


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