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'[PIC] 16F18854 CWG Setup in Assembly'
2017\08\02@003155 by James Wages

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I've successfully programmed the CWG on a PIC16F1508 in Assembly in the past.  I am now attempting to do the same on the PIC16F18854 chip, but there appears to be a datasheet error that is obscuring my path forward.  Please refer to "20.12 Configuring the CWG" on page 266 if the PIC16(L)F18854 datasheet (Rev.B):

http://ww1.microchip.com/downloads/en/DeviceDoc/40001826B.pdf

Specifically note the following 3 steps extracted from Section 20.12, which are to be performed in sequence:

7. Configure the following controls.
   c. Set the output enables for the desired outputs.  8. Set the EN bit.
9. Clear TRIS control bits corresponding to the desired output pins to configure these pins as outputs.


The "output enables" mentioned in 7c above is the main issue.  You can see an "Output Enables" section 20.4.1 in the datasheet, which makes reference to "Gx1OEx <3:0> bits.  That reference appears to be a datasheet error insofar as "Gx1OEx" does not appear under any register in that entire datasheet, nor can I find anything close to resembling "Gx1OEx" in the p16f18854.inc file.

That apparent datasheet error, in addition to the fact that many registers used on the 16F18854 are different from the 16F1508, means I cannot simply copy/paste my 16F1508 ASM code into my 16F18854 code.

Simply put, I'm trying to figure out the correct ASM code for CWG setup sequence on the 16F8854.

For sake of comparing the CWG Setup between the two PICs I've mentioned, Step-6 in Section 26.11 on page 285 of the 16F1508 datasheet makes it clear that register CWGxCON0 is to be used on the 16F1508.  But CWGxCON0 cannot be used for that same purpose on the 16F18854.  Even so, the basic concept SHOULD be the same; meaning, we need to ensure CWG1A, CWG1B, etc. are mapped as Outputs.  The 16F1508 does not have PPS mapping so it was easier for me to figure out the CWG setup sequence in ASM on that PIC.  I'm new to PPS mapping with the 16F18854, but the 16F18854 datasheet indicates the following on the subject:
PPS Outputs are defined by RxyPPS, where Rxy = R + Port + bit
(So PortA, bit0 = RA0PPS)
The 16F18854 datasheet also defines this:
RxyPPS value for CWG1A = 0x05
RxyPPS value for CWG1B = 0x06

So in theory, the ASM code I've written in the following GIST should assign CWG1A as an Output on RB0 and CWG1B as an Output on RB1, contingent on my TRISB settings:

https://gist.github.com/JDW1/387838530f298e71f3c7182ff1c48930

Does my code look correct?

I now have a related question.  Will my code unhitch the CWG1IN & CWG2IN "inputs" which are default-assigned to RB0 and RB1 respectively? (My aim is to make the NCO output the CWG input, so external CWG inputs are not needed in my application.)

I would appreciate hearing your thoughts.

Thank you,

James Wages




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2017\08\03@202650 by James Wages

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My apologies about the double-post, but Piclist Admin Bob Blick kindly reminded me I had neglected to add the required "[PIC]" tag on my first post and he suggested I repost with the tag.

I'm curious if the dearth of replies indicates that no one on this list has experience with Microchip "PPS"?  Or is it that fewer and fewer now program PICs in Assembly?  :-)

Regardless, I would appreciate hearing your helpful feedback.

Many thanks,

James Wages

       ------------------------------
       Message: 2
   Date: Wed, 02 Aug 2017 13:31:51 +0900
   From: James Wages <spam_OUTjamesTakeThisOuTspamkiramek.com>
   Subject: [PIC] 16F18854 CWG Setup in Assembly
   To: <.....piclistKILLspamspam@spam@mit.edu>
   Message-ID: <35C6736D-D089-4BFA-B88B-275E382BF3F2spamKILLspamkiramek.com>>    Content-Type: text/plain;        charset="UTF-8"
       I've successfully programmed the CWG on a PIC16F1508 in Assembly in the past.  I am now attempting to do the same on the PIC16F18854 chip, but there appears to be a datasheet error that is obscuring my path forward.  Please refer to "20.12 Configuring the CWG" on page 266 if the PIC16(L)F18854 datasheet (Rev.B):
       ww1.microchip.com/downloads/en/DeviceDoc/40001826B.pdf
       Specifically note the following 3 steps extracted from Section 20.12, which are to be performed in sequence:
       7. Configure the following controls.             c. Set the output enables for the desired outputs.          8. Set the EN bit.
        9. Clear TRIS control bits corresponding to the desired output pins to configure these pins as outputs.
           The "output enables" mentioned in 7c above is the main issue.  You can see an "Output Enables" section 20.4.1 in the datasheet, which makes reference to "Gx1OEx <3:0> bits.  That reference appears to be a datasheet error insofar as "Gx1OEx" does not appear under any register in that entire datasheet, nor can I find anything close to resembling "Gx1OEx" in the p16f18854..inc file.
       That apparent datasheet error, in addition to the fact that many registers used on the 16F18854 are different from the 16F1508, means I cannot simply copy/paste my 16F1508 ASM code into my 16F18854 code.
       Simply put, I'm trying to figure out the correct ASM code for CWG setup sequence on the 16F8854.
       For sake of comparing the CWG Setup between the two PICs I've mentioned, Step-6 in Section 26.11 on page 285 of the 16F1508 datasheet makes it clear that register CWGxCON0 is to be used on the 16F1508.  But CWGxCON0 cannot be used for that same purpose on the 16F18854.  Even so, the basic concept SHOULD be the same; meaning, we need to ensure CWG1A, CWG1B, etc. are mapped as Outputs.  The 16F1508 does not have PPS mapping so it was easier for me to figure out the CWG setup sequence in ASM on that PIC.  I'm new to PPS mapping with the 16F18854, but the 16F18854 datasheet indicates the following on the subject:
        PPS Outputs are defined by RxyPPS, where Rxy = R + Port + bit
   (So PortA, bit0 = RA0PPS)
        The 16F18854 datasheet also defines this:
   RxyPPS value for CWG1A = 0x05
   RxyPPS value for CWG1B = 0x06
       So in theory, the ASM code I've written in the following GIST should assign CWG1A as an Output on RB0 and CWG1B as an Output on RB1, contingent on my TRISB settings:
       gist.github.com/JDW1/387838530f298e71f3c7182ff1c48930
       Does my code look correct?
            I now have a related question.  Will my code unhitch the CWG1IN & CWG2IN "inputs" which are default-assigned to RB0 and RB1 respectively? (My aim is to make the NCO output the CWG input, so external CWG inputs are not needed in my application.)
       I would appreciate hearing your thoughts.
       Thank you,
       James Wages
                           ------------------------------
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2017\08\03@211411 by James Cameron

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G'day James,

I've not used either of these chips, CWG, or PPS, but I've looked
briefly at the two datasheets.

Moving from PIC16F1508 to PIC16F18854 adds silicon IP for a peripheral
pin select (PPS) module.  Block diagrams in the '18854 CWG section
refer to signal names in the IP rather than signal names exposed in
registers or at pins.  So my guess is that "Gx1OEx <3:0> bits" are
internal signals; and the datasheet is in error at that point.

On your related question; from the description of the '18854 PPS
section, especially figure 13-1 simplified PPS block diagram, and
section 13.3 on bidirectional pins, it doesn't seem likely to me that
your hitching of outputs will affect the inputs.  Consider them
default-assigned, along with the other inputs also default-assigned to
RB0 and RB1.

So if you don't want to use the CWGxIN signals, make sure you have not
selected them in the CWGxISM register.  (per table 20-2).

-- James Cameron
http://quozl.netrek.org/
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2017\08\03@214355 by stephen.forrestn/a

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Like James C., I haven't used this chip or peripherals but this seems like a question to ask on Microchip Forums (there is even a specific Waveform Control forum) or raise a support ticket directly with Microchip...
It seems this is a relatively new chip so some shakedown is probably needed - there is an errata with reference to the CWG - may be unrelated?
http://ww1.microchip.com/downloads/en/DeviceDoc/80000698A.pdf

Stephen


{Original Message removed}

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