Post by thread:[PIC]:strange analog in problem

Using the F877, I have PortA configured for analog inputs, and had 10K pots. Seemed to work ok, I had a watch window set up, and a breakpoint right after the read sequences (for 4 pots). I've changed the pots to 50K now, and upped the aquisition time, but the values seem to be way off now, and are affected by each other. ie... if I read just one, it is close...but not exact. If I put the second pot in the loop to read, the first one goes way off scale. I've read the actual voltages on the pins, and they are not changing. Anyone ever seen where just reading a second port affects the value of the first one? _________________________________________________________________ Join the world s largest e-mail service with MSN Hotmail. http://www.hotmail.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

>I've changed the pots to 50K now, and upped the aquisition time, but the >values seem to be way off now, and are affected by each other. As I recall, the maximum recommended input impedence for analog sources is 10k, according to the datasheets. I'm sure higher impedances would require longer acquisition times, but I'm NOT sure that there are no other problems. I'd keep it around 5k to 10k just to be safe. I'm sure someone with "internal" knowledge of the PIC's construction will chime in and debunk Microchip's recommendations, but I tend to stick by their datasheets just to be safe. --Andrew _________________________________________________________________ Chat with friends online, try MSN Messenger: http://messenger.msn.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

At 10:14 AM 6/11/02 -0600, Micro Eng wrote: >Using the F877, I have PortA configured for analog inputs, and had 10K pots. >Seemed to work ok, I had a watch window set up, and a breakpoint right after >the read sequences (for 4 pots). > >I've changed the pots to 50K now, and upped the aquisition time, but the >values seem to be way off now, and are affected by each other. > >ie... > >if I read just one, it is close...but not exact. If I put the second pot in >the loop to read, the first one goes way off scale. I've read the actual >voltages on the pins, and they are not changing. >Anyone ever seen where just reading a second port affects the value of the >first one? You have 2 potential problems: input impedance and acquisition time. Microchip specifies that your source impedance should be no higher than 10K - you have a worst case source impedance of 25K (when the pot is in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the analog input to gnd. The cap supplies the charge required when the input is sampled and restores full accuracy to the a/d input. The 2nd problem is acquisition time. You have to allow a minimum setup time between when you select the desired analog input pin and when you start the a/d conversion. This time is specified fully in the data sheet but is typically 30 us or so. In other words, do this: select a/d pin, do something useful or waste time for at least 30 us, start a/d conversion. Note that when you are processing the result of a conversion that has already completed, you can select the next desired a/d channel BEFORE you actually start processing the data. Changing the a/d input does not corrupt the a/d result register (ADRES). Deal with both of those issues and see if the problems go away. dwayne -- Dwayne Reid <spam_OUTdwaynerTakeThisOuTplanet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Dale, Wrong. 40k max. Assume the pot is wired from a pair of stiff sources (Vcc/Vdd and GND for example). Worst case (highest impedance) will be with the wiper at mid-range. Thats two 20k resistors in parallel for an equivalent wiper (input) impedance of 10k (as recommended in the data sheets). Of course, I haven't seen a lot of 40k pots advertised lately (25k is a standard) so in that sense, maybe you are (approximately) right. Regards, Dave Dale Botkin wrote: > 10K. That's the spec maximum input impedance, meaning you can use a 20K > pot at most (right??). -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Hrmm... not sure I'm with you on that one. With the wiper centered, your input would still see 20K Ohms to either source. Maybe I'm just slow or theory-challenged, but I don't see how two resistors to two different sources would qualify as "parallel". I could be wrong though, here I am posting from work again, which results in my being wrong about 3 out of 4 times it seems. Dale -- "Curiosity is the very basis of education and if you tell me that curiosity killed the cat, I say only the cat died nobly." - Arnold Edinborough On Tue, 11 Jun 2002, David Minkler wrote: > Wrong. 40k max. Assume the pot is wired from a pair of stiff sources > (Vcc/Vdd and GND for example). Worst case (highest impedance) will be > with the wiper at mid-range. Thats two 20k resistors in parallel for an > equivalent wiper (input) impedance of 10k (as recommended in the data > sheets). Of course, I haven't seen a lot of 40k pots advertised lately > (25k is a standard) so in that sense, maybe you are (approximately) > right. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> Using the F877, I have PortA configured for analog inputs, and had 10K pots. > Seemed to work ok, I had a watch window set up, and a breakpoint right after > the read sequences (for 4 pots). > > I've changed the pots to 50K now, and upped the aquisition time, but the > values seem to be way off now, and are affected by each other. Microchip specifies the A/D source should be 10Kohm or less. Yours could be 2.5 times higher, so you should either use 20Kohm pots max, or buffer the voltages. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

I don't have an F877 datasheet handy (the 18c452 datasheet I DO have handy says 2.5k max for its 10 bit A/D). But assuming it is indeed a 10k max, that'd allow a 40k pot. The maximum Thevinin resistance is Rpot/4. If you have a 40k pot, the Thevinin resistance is 20k//20k or 10k. For more on Thevenin Equivalents, see http://www.hallikainen.org/rw/theory/theory5.html Harold On Tue, 11 Jun 2002 11:42:29 -0500 Dale Botkin <.....daleKILLspam@spam@BOTKIN.ORG> writes: {Quote hidden}> On Tue, 11 Jun 2002, Lyle Killough wrote: > > > . . . Disclaimer . . . I have never even read the F877 data > sheet > > I have... > > > Are you maybe having trouble charging the input capacitance of the > ADC > > through 50k? I kind of remember a 5k recommended maximum on the > data > > sheets for some of the other PICs with analog inputs. > > 10K. That's the spec maximum input impedance, meaning you can use a > 20K > pot at most (right??). > > Dale > > -- > http://www.piclist.com hint: PICList Posts must start with ONE > topic: > [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: > ->Ads > > FCC Rules Online at http://hallikainen.com/FccRules Lighting control for theatre and television at http://www.dovesystems.com Reach broadcasters, engineers, manufacturers, compliance labs, and attorneys. Advertise at http://www.hallikainen.com/FccRules/ . ________________________________________________________________ GET INTERNET ACCESS FROM JUNO! Juno offers FREE or PREMIUM Internet access for less! Join Juno today! For your FREE software, visit: dl.http://www.juno.com/get/web/. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> Microchip specifies that your source impedance should be no higher > than 10K - you have a worst case source impedance of 25K (when the pot is > in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the > analog input to gnd. The cap supplies the charge required when the input > is sampled and restores full accuracy to the a/d input. Not so fast. Yes, a large cap will hold the pin voltage constant during the brief acquisition interval, but accuracy may still be off and the "cross talk" between channels may become worse. If the A/D input is constantly cycled between channels, then a current path is effectively created from each channel to the previous channel. The magnitude of this current is proportional to the capacitor in the PIC and the full input channels cycle frequency. Given such a steady charge pump pin current, the external capacitor will average to an offset error of the current times the source impedence. Since the large external capacitor is holding the offset error, it will not have time to decay away during a normal acquisition time. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> Wrong. 40k max. Assume the pot is wired from a pair of stiff sources > (Vcc/Vdd and GND for example). Worst case (highest impedance) will be > with the wiper at mid-range. Thats two 20k resistors in parallel for an > equivalent wiper (input) impedance of 10k (as recommended in the data > sheets). Of course, I haven't seen a lot of 40k pots advertised lately > (25k is a standard) so in that sense, maybe you are (approximately) > right. Oh, yeah, duh! I made the same mistake in an earlier post. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> > Using the F877, I have PortA configured for analog inputs, and had 10K > pots. > > Seemed to work ok, I had a watch window set up, and a breakpoint right > after > > the read sequences (for 4 pots). > > > > I've changed the pots to 50K now, and upped the aquisition time, but the > > values seem to be way off now, and are affected by each other. > > Microchip specifies the A/D source should be 10Kohm or less. Yours could be > 2.5 times higher, so you should either use 20Kohm pots max, or buffer the > voltages. As someone else pointed out, this is off by a factor of two. The highest impedence from a 50Kohm pot tied to ground and supply at the fixed ends is 12.5Kohms, not 25Kohms. You should not use anything higher than a 40Kohm pot, assuming the fixed ends are driven with 0 impedence. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Brendan and Dale, The pot with the centered wiper, end terminals connected to STIFF sources (like Vcc and GND), is a Thevenin equivalent to Rpot/4 from (in the case of this example) a source voltage of Vcc/2. This offers you some interesting possibilities for de-linearizing a pot. In one motion control application we needed a pot to control a (large) servo so that with the pot centered we got no (very little) motion. With the pot turned half way from centered to either side (1/4 and 3/4) we got 10% velocity and at the extremes we got full velocity. Using a 5k pot with the end terminals connected to + and -10V with a 232 ohm de-linearizing resistor from the wiper to ground we got exactly the curve we were hoping for. Not much response near center ... lots of response at the ends. Regards, Dave Brendan Moran wrote: > > Isn't that only how it works under AC cnditions, where both DC sources are > considered the same? > > Brendan > > {Original Message removed}

At 01:53 PM 6/11/02 -0500, Dale Botkin wrote: >Hrmm... not sure I'm with you on that one. With the wiper centered, your >input would still see 20K Ohms to either source. Maybe I'm just slow or >theory-challenged, but I don't see how two resistors to two different >sources would qualify as "parallel". yeah - but they are indeed in parallel in terms of the impedance seen at the wiper. I made the same mistake 'cuz I was in too much of a hurry. dwayne -- Dwayne Reid <dwaynerKILLspamplanet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

At 03:42 PM 6/11/02 -0400, Olin Lathrop wrote: > > Microchip specifies that your source impedance should be no higher > > than 10K - you have a worst case source impedance of 25K (when the pot is > > in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the > > analog input to gnd. The cap supplies the charge required when the input > > is sampled and restores full accuracy to the a/d input. > >Not so fast. Yes, a large cap will hold the pin voltage constant during the >brief acquisition interval, but accuracy may still be off and the "cross >talk" between channels may become worse. Nope - I disagree here. Been there, done that, spent rather a long time verifying performance. Cross talk is definitely NOT made worse by adding the cap. But I should qualify my statement: the addition of the cap reduces the effect of series impedance so long as the sample rate is rate is slow enough that the charge removed (or added) during the sample process is completely restored before the next sample occurs. A quick look at the ratio between how long the sample switch is closed on a particular channel vs how long it is open suggests that this is not a problem if sampling only 2 channels at the fastest possible sample rate and definitely not a problem is sampling 4 channels or more. Its absolutely not a problem with 100K series resistors and 1 uF caps when sampling channels at a 1 ms rate - again, I spent a lot of time verifying accuracy in one project before deciding it was OK. But take away the capacitors - not acceptable. dwayne -- Dwayne Reid <.....dwaynerKILLspam.....planet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

A "stiff" power supply means one that has nearly zero impedance. That means that both ends of the pot, for purposes of analysis, are at the same impedance point (since a power supply can be represented as a pure voltage source with either a parallel or series resistor equal to the output impedance). Ahhh, Thevenin and Norton! How I miss them--NOT!! Doug Hemingway Dale Botkin at EraseMEdalespam_OUTTakeThisOuTBOTKIN.ORG wrote on 6/11/02 2:53 PM: > Hrmm... not sure I'm with you on that one. With the wiper centered, your > input would still see 20K Ohms to either source. Maybe I'm just slow or > theory-challenged, but I don't see how two resistors to two different > sources would qualify as "parallel". I could be wrong though, here I am > posting from work again, which results in my being wrong about 3 out of 4 > times it seems. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Micro Eng wrote... >Using the F877, I have PortA configured for analog inputs, and had 10K pots. >Seemed to work ok, I had a watch window set up, and a breakpoint right after >the read sequences (for 4 pots). > >I've changed the pots to 50K now, and upped the aquisition time, but the >values seem to be way off now, and are affected by each other. This is a symptom of not allowing enough acquisition time. Whatever acquisition time you're allowing, try increasing it by a factor of ten or so, just as an experiment, and see if the problem goes away. If it does, you've found the problem. Others have pointed out in this thread that Microchip recommends the PIC A/D inputs be driven from no more than 10K ohms impedance. That's correct, but understand that 10K is merely the maximum driving impedance allowable for the A/D to perform at its full rated accuracy- it's **NOT** a maximum beyond which operation will cease or go haywire or cause the heavens to fall or cause the PIC to emit smoke and noxious gases. For source impedances a lot higher than 10K ohms there can be significant DC errors due to pin leakage, especially at high temperatures. In some applications a small error would be tolerable, in some it would not. In your case, you are not exceeding the 10K maximum spec by enough that you would expect see any significant DC errors; at midscale (i.e., worst case), the source impedance seen at your pot wipers is only 12.5K ohms. My best guess is that before, with your 10K pots, whatever acquistion time you were providing was marginally adequate; and now, with 50K pots, it isn't enough and the readings are "bleeding over" into one another. Hope this helps... DD -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Hi all, Perhaps I'm not understanding something here, but how does the cap help with the leakage current? Isn't their always leakage current on the pin, regardless of whether you are sampling or not? Sean At 02:50 PM 6/11/2002 -0600, you wrote: Nope - I disagree here. Been there, done that, spent rather a long time {Quote hidden}>verifying performance. Cross talk is definitely NOT made worse by adding >the cap. > >But I should qualify my statement: the addition of the cap reduces the >effect of series impedance so long as the sample rate is rate is slow >enough that the charge removed (or added) during the sample process is >completely restored before the next sample occurs. A quick look at the >ratio between how long the sample switch is closed on a particular channel >vs how long it is open suggests that this is not a problem if sampling only >2 channels at the fastest possible sample rate and definitely not a problem >is sampling 4 channels or more. > >Its absolutely not a problem with 100K series resistors and 1 uF caps when >sampling channels at a 1 ms rate - again, I spent a lot of time verifying >accuracy in one project before deciding it was OK. But take away the >capacitors - not acceptable. > >dwayne > >-- >Dwayne Reid <dwaynerspam_OUTplanet.eon.net> >Trinity Electronics Systems Ltd Edmonton, AB, CANADA >(780) 489-3199 voice (780) 487-6397 fax > >Celebrating 18 years of Engineering Innovation (1984 - 2002) > .-. .-. .-. .-. .-. .-. .-. .-. .-. .- > `-' `-' `-' `-' `-' `-' `-' `-' `-' >Do NOT send unsolicited commercial email to this email address. >This message neither grants consent to receive unsolicited >commercial email nor is intended to solicit commercial email. > >-- >http://www.piclist.com hint: PICList Posts must start with ONE topic: >[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads > -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

----- Original Message ----- From: "Dwayne Reid" <@spam@dwaynerKILLspamPLANET.EON.NET> To: <KILLspamPICLISTKILLspamMITVMA.MIT.EDU> Sent: Tuesday, June 11, 2002 12:54 PM Subject: Re: [PIC]:strange analog in problem > At 10:14 AM 6/11/02 -0600, Micro Eng wrote: > >Using the F877, I have PortA configured for analog inputs, and had 10K pots. > >Seemed to work ok, I had a watch window set up, and a breakpoint right after > >the read sequences (for 4 pots). > > > >I've changed the pots to 50K now, and upped the aquisition time, but the > >values seem to be way off now, and are affected by each other. > > > >ie... > > > >if I read just one, it is close...but not exact. If I put the second pot in > >the loop to read, the first one goes way off scale. I've read the actual > >voltages on the pins, and they are not changing. > >Anyone ever seen where just reading a second port affects the value of the > >first one? > > You have 2 potential problems: input impedance and acquisition > time. Microchip specifies that your source impedance should be no higher > than 10K - you have a worst case source impedance of 25K (when the pot is > in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the > analog input to gnd. The cap supplies the charge required when the input > is sampled and restores full accuracy to the a/d input. This is _not_ a complete cure because, in addition to the CHOLD charge time, there is leakage on the input pin that can pull the voltage away from where the pot sets it. Bob Ammerman RAm Systems {Quote hidden}> The 2nd problem is acquisition time. You have to allow a minimum setup > time between when you select the desired analog input pin and when you > start the a/d conversion. This time is specified fully in the data sheet > but is typically 30 us or so. In other words, do this: select a/d pin, do > something useful or waste time for at least 30 us, start a/d conversion. > > Note that when you are processing the result of a conversion that has > already completed, you can select the next desired a/d channel BEFORE you > actually start processing the data. Changing the a/d input does not > corrupt the a/d result register (ADRES). > > Deal with both of those issues and see if the problems go away. > > dwayne > > -- > Dwayne Reid <RemoveMEdwaynerTakeThisOuTplanet.eon.net> > Trinity Electronics Systems Ltd Edmonton, AB, CANADA > (780) 489-3199 voice (780) 487-6397 fax > > Celebrating 18 years of Engineering Innovation (1984 - 2002) > .-. .-. .-. .-. .-. .-. .-. .-. .-. .- > `-' `-' `-' `-' `-' `-' `-' `-' `-' > Do NOT send unsolicited commercial email to this email address. > This message neither grants consent to receive unsolicited > commercial email nor is intended to solicit commercial email. > > -- > http://www.piclist.com hint: PICList Posts must start with ONE topic: > [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads > > > -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> Hrmm... not sure I'm with you on that one. With the wiper centered, your > input would still see 20K Ohms to either source. Maybe I'm just slow or > theory-challenged, but I don't see how two resistors to two different > sources would qualify as "parallel". I could be wrong though, here I am > posting from work again, which results in my being wrong about 3 out of 4 > times it seems. > > Dale Here is a rough analogy to help you out.... Think of the two halves of the pot as compression springs, with spring tension inversly proportional to resistance. Now the way that they resist motion of the point at which they connect is certainly dependent on both of them. Bob Ammerman RAm Systems -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

At 07:36 PM 6/11/02 -0400, Sean H. Breheny wrote: >Hi all, > >Perhaps I'm not understanding something here, but how does the cap help >with the leakage current? Isn't their always leakage current on the pin, >regardless of whether you are sampling or not? Leakage current is not the primary error source here. The S/H capacitor on the input of the a/d convertor presents a sudden 50 pF load to the input - the droop that is caused while that cap charges is the error source. Try it sometime - write some code that reads the voltage on an analog pin. Apply some arbitrary voltage to an a/d input through a 10K resistor and look at voltage on the pin with a scope. Now change the resistor to 100K and look at it again. Now add a 1 uF cap between the pin and ground and look once more. dwayne -- Dwayne Reid <spamBeGonedwaynerspamBeGoneplanet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

At 01:34 PM 6/11/02 -0400, Bob Ammerman wrote: > > > > You have 2 potential problems: input impedance and acquisition > > time. Microchip specifies that your source impedance should be no higher > > than 10K - you have a worst case source impedance of 25K (when the pot is > > in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the > > analog input to gnd. The cap supplies the charge required when the input > > is sampled and restores full accuracy to the a/d input. > >This is _not_ a complete cure because, in addition to the CHOLD charge time, >there is leakage on the input pin that can pull the voltage away from where >the pot sets it. True. I did not mean to imply that the cap cures all the effects of too high a source impedance and perhaps I should have stated that in my initial post. But the predominant error source seems to be from the S/H cap and not leakage. The message that started this thread referred to a specific problem that was caused by either of 2 problems: not enough acquisition time or too high a source impedance. I goofed on the source impedance - too quick on the keyboard. But *if* the source impedance had in fact been 25K and if the error was caused by that too-high source impedance (not acquisition time), adding the cap as I stated would have cured the problem. dwayne -- Dwayne Reid <TakeThisOuTdwaynerEraseMEspam_OUTplanet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

I've got a bit lost now but wasn't part of the original problem that the seperate ADC channels were being "mixed up" and I believed this to be caused by the >10K input impendance which fails to meet the required pin leak-age specification and thus the pins leak? See note 3 under A/D Acquisition Requirements on the 16F877 datasheet. QUOTE: "The maximum recommended impedance for analog sources is 10K This is required to meet the pin leak-age specification." Surely no matter how much aquisition time you allow once you've got leakage your stuck! Isn't the solution to simply reduce the input impedance? I understand the S/H idea but why do you think the problem has got nothing to do with leakage? How else do you explain the interaction BETWEEN channels? Or is it because all channels use the same S/H circuitry or something? Regards Pete > >Perhaps I'm not understanding something here, but how does > the cap help > >with the leakage current? Isn't their always leakage current > on the pin, > >regardless of whether you are sampling or not? > > Leakage current is not the primary error source here. The > S/H capacitor -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

On Tue, 11 Jun 2002, Dwayne Reid wrote: > At 01:34 PM 6/11/02 -0400, Bob Ammerman wrote: > > > > > > You have 2 potential problems: input impedance and acquisition > > > time. Microchip specifies that your source impedance should be no higher > > > than 10K - you have a worst case source impedance of 25K (when the pot is > > > in the exact middle). The cure is simple - add a 0.1 - 1 uF cap from the > > > analog input to gnd. The cap supplies the charge required when the input > > > is sampled and restores full accuracy to the a/d input. > > > >This is _not_ a complete cure because, in addition to the CHOLD charge time, > >there is leakage on the input pin that can pull the voltage away from where > >the pot sets it. > > True. I did not mean to imply that the cap cures all the effects of too > high a source impedance and perhaps I should have stated that in my initial > post. But the predominant error source seems to be from the S/H cap and > not leakage. > Right. The input impedance can be higher than 10k. But the SH capacitor must have enough time to charge. The problem is not so evident using just one ad input. But the required aquisition time must be at least doubled when more than one ad input is used and imput impedance is 10...20K. Our friend from Israel forgot to use the minimum delay of 20uS or so after channel switching. He has no problem with the impedance for sure. But may have problems with cumulative noises because the filtering cap at high input impedances is not recommended. Vasile -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

> -----Original Message----- > From: Dwayne Reid [SMTP:RemoveMEdwaynerTakeThisOuTPLANET.EON.NET] > Sent: Wednesday, June 12, 2002 1:53 AM > To: PICLISTEraseME.....MITVMA.MIT.EDU > Subject: Re: [PIC]:strange analog in problem > > True. I did not mean to imply that the cap cures all the effects of too > high a source impedance and perhaps I should have stated that in my > initial > post. But the predominant error source seems to be from the S/H cap and > not leakage. > The datasheet shows a typical leakage current of 500nA. With a 100K source impedance this could give an error of 100k*500n = 50mV. On a typical PIC using (5v) Vcc as a reference this would give around 10 counts of error (around 3.3 bits). If this was constant then it may not be a problem, but leakage current by their very nature are quite temperature dependant. Regards Mike -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

Put a 0.01uF tant across each analog input, I read somewhere in microchips app notes about an issue with more than one analog input. Something like sampling one causes a current drop on the port, then when you do the other one the reference point is still changing _while_ you sample so it gets messed up, I can't remember exactly but it definitely said use a cap to cure the problem I'll try to find the app note for you.. Hope this helps. Jonathan Starr >>> Micro Eng <EraseMEmicro_engHOTMAIL.COM> 11/06/2002 17:14:35 >>> Using the F877, I have PortA configured for analog inputs, and had 10K pots. Seemed to work ok, I had a watch window set up, and a breakpoint right after the read sequences (for 4 pots). I've changed the pots to 50K now, and upped the aquisition time, but the values seem to be way off now, and are affected by each other. ie... if I read just one, it is close...but not exact. If I put the second pot in the loop to read, the first one goes way off scale. I've read the actual voltages on the pins, and they are not changing. Anyone ever seen where just reading a second port affects the value of the first one? _________________________________________________________________ Join the world s largest e-mail service with MSN Hotmail. http://www.hotmail.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

On Wed, 12 Jun 2002, Alan B. Pearce wrote: > >but I don't see how two resistors to two different > >sources would qualify as "parallel". > > Go back to basic circuit theory and try the Thevinen (sp?) equivalent > circuit. Come on Alan ! ;-) Don't send him to the basics, is much easy considering the gnd and the Vcc with 0 impedance , gnd because is ground and Vcc because it cames from a zero output impedance stabilizer, so you have two resistors connected in parallel because vcc and gnd are equal to 0 ( as impedance and not as values ) Of course the crude reality is a little different... Vasile -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

> Come on Alan ! ;-) > Don't send him to the basics, is much easy considering >the gnd and the Vcc with 0 impedance , gnd because is >ground and Vcc because it cames from a zero output impedance >stabilizer, so you have two resistors connected in parallel >because vcc and gnd are equal to 0 ( as impedance and not as >values ) So you have just explained the very basics that I was suggesting he go back to. :) After all this is how a Thevinin circuit configuration is arrived at, by considering voltage sources to be a 0 ohm impedance. -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

> If I recall correctly, the general idea is that (perfect) voltage sources > have 0 impedance and (perfect) current sources have infinite impedance. If > you consider the 0 impedance of the voltage source, the two sides are > actually 'connected' in parallel. > > I hope I got it right. ;-) Yes, you did. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

Some more information.... after reading thru the posts.....seems to be a couple of avenues to go down. The first is increase the setup time. Second is to add a capacitor to ground on the pin. Haven't tried this, as it seems to be in discussion if this is even a correct approach. There is two problems still...accuracy and multiple channel reads. I changed the code to read in just a single input,and modified the setup delay values. I started with 255, ranged down to 10. ; xtal is 4.194 Mhz AD_read movwf ADCON0 call ADSetup bsf ADCON0,GO ; Start first A/D conversion btfsc ADCON0,GO goto $-1 movf ADRESH,W ; Get A/D value and put in W reg return ; return with value in W ADSetup movlw d'5' movwf DelayAD decfsz DelayAD,f goto $-1 I put in a breakpoint right after the call to read, and a watch window to look at the data. The first time thru, after being reprogrammed, from an expected value of d'178' for a voltage of 3.5V, the value is 178 with a delay of 10, or if the value is '255' for the delay, the first read is 186. The second time and all reads after that, read '187'. The interesting thing is from a range of 1.5V up to 3.5V, the expected value vs the final stable value all have a difference of 7 bits. Someone mentioned the leakage current could produce such an offset. I can deal with an offset if I knew it was constant, but why the initial reading be closer to the actual value and the readings after that be stable. So, as a result, the setup delay doesn't seem to have a large difference, although I would expect it to actually. Is there another delay that I didnt account for? And this still hasn't looked at the multiple channel reads either. _________________________________________________________________ MSN Photos is the easiest way to share and print your photos: http://photos.msn.com/support/worldwide.aspx -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

On Wed, 12 Jun 2002, Dale Botkin wrote: >On Tue, 11 Jun 2002, Dave Dilatush wrote: > >> All this is related to a thing called Thevenin's Theorem: >> >> http://hyperphysics.phy-astr.gsu.edu/hbase/electric/thevenin.html > >Well, sunuvabitch. Guess this is one of those occasions I wish I'd had >the opportunity to spend more than a semester in college. Happens a >couple of times a year. Thanks for the link, that explains it nicely. And then research Norton's theorem which is Thevenin spelled backwards, in a way. Peter -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

Have you considered first to suppress all analogical problem you may have ? Like analogic ground, the point where you connect the analogic input voltage, the garbage on your Vcc supply ( assuming you still use switching PSU for test) etc. 100nF and 10uF directly on PIC supply pins. Usual no cap are required from ad input to gnd. If you still want them, use a small signall input impedance and no more than 47nF. And of course if your analogic signal is comming from elswere, then check first how clean is. Delay must be at least 20uS. A leackage offset is temperature dependent. You have another problem there. regards, Vasile http://www.geocities.com/vsurducan On Wed, 12 Jun 2002, Micro Eng wrote: {Quote hidden}> Some more information.... > > after reading thru the posts.....seems to be a couple of avenues to go down. > > The first is increase the setup time. Second is to add a capacitor to ground > on the pin. Haven't tried this, as it seems to be in discussion if this is > even a correct approach. > > There is two problems still...accuracy and multiple channel reads. > > I changed the code to read in just a single input,and modified the setup > delay values. I started with 255, ranged down to 10. > > ; xtal is 4.194 Mhz > > AD_read > movwf ADCON0 > call ADSetup > bsf ADCON0,GO ; Start first A/D conversion > btfsc ADCON0,GO > goto $-1 > movf ADRESH,W ; Get A/D value and put in W reg > return ; return with value in W > > > ADSetup > movlw d'5' > movwf DelayAD > decfsz DelayAD,f > goto $-1 > > I put in a breakpoint right after the call to read, and a watch window to > look at the data. > > The first time thru, after being reprogrammed, from an expected value of > d'178' for a voltage of 3.5V, the value is 178 with a delay of 10, or if the > value is '255' for the delay, the first read is 186. The second time and > all reads after that, read '187'. The interesting thing is from a range of > 1.5V up to 3.5V, the expected value vs the final stable value all have a > difference of 7 bits. Someone mentioned the leakage current could produce > such an offset. I can deal with an offset if I knew it was constant, but > why the initial reading be closer to the actual value and the readings after > that be stable. > > So, as a result, the setup delay doesn't seem to have a large difference, > although I would expect it to actually. Is there another delay that I didnt > account for? > > And this still hasn't looked at the multiple channel reads either. > > > > > _________________________________________________________________ > MSN Photos is the easiest way to share and print your photos: > http://photos.msn.com/support/worldwide.aspx > > -- > http://www.piclist.com hint: The list server can filter out subtopics > (like ads or off topics) for you. See http://www.piclist.com/#topics > > -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

Along these lines... What happens if I need to measure a resistance to the tune of 100K to 1M using the ad on the 16F877? I had been toying with the idea of using a fixed resistance and the variable forming a voltage divider, with the common point being fed to the PIC AD. Following this thread's indicated that the max. impedence for reliable operation should NOT be more than 20K. Are there any suggestions? The resisatnce to be measured is in fact a sensor, and therefore I do not require the reading in ohms, as such. A look up table can give me the values to be indiacted on the diaplay. Regards, Anand Dhuru -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

> Following this thread's indicated that the max. impedence for reliable > operation should NOT be more than 20K. Are there any suggestions? I'd consider signal conditioning circuitry. Whenever sampling data it's a good idea to condition the signal before entering the ADC. Use it to amplify, clean up (filter), scale and impendace match the signal to the ADC inputs. The cheapest and simplest item is an Op-Amp (High input impedance (so won't effect the sensor being observed) and low output impedance (so ideal for the ADC). I've used op-amps to amplify the uV signals from a K-Type thermocouple probe before entering the ADC of a PIC. With correct gain setting of the ADC I was able to set it up so that the 10-bit number read from the ADC was the exact temperature. So no software scaling or look up tables required. If you're interested in dynamic changes of the signal then you really should think about Nyquist theory. Limit the frequency bandwidth of the signal to 1/2 the sampling frequency, otherwise you'll get aliasing and a host of unusual effects. (Or rather... sample at twice the maximum frequency bandwidth of the signal of interest) Simple R/C filters will do the trick for many systems, you can set gain and filtering with various op-amp circuits. Anything more and you should really be using a DSP as the PIC will begin to struggle. Regards Pete -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

> -----Original Message----- > From: Pic Dude [SMTP:RemoveMEpicdudeTakeThisOuTspamAVN-TECH.COM] > Sent: Thursday, June 13, 2002 4:17 PM > To: EraseMEPICLISTspamspamBeGoneMITVMA.MIT.EDU > Subject: Re: [PIC]:strange analog in problem > > For simplicity, could you not form a voltage divider > w/2 fixed resistors, and the large variable resistor > to be measured placed in parallel across one of the > fixed resistors? Of course you now need some math > since the voltage measured at the AD port is no longer > linearly proportional to the variable resistance. > > Cheers, > -Neil. > The change in voltage at the A/D converter would be very small which could reduce resolution to unacceptable levels. Regards Mike -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

Hi, The problem with these voltage divider schemes is that you will only be able to use a comparatively small fraction of the ADC range thereby limiting your measurement resolution. Adding additional "parallel (in the Thevenin sense)" resistors to the network without scaling the network to compensate will only make the problem worse. The voltage non-linearity of these resistive networks may actually turn out to be a benefit if the sensor changes its resistance in an exponential or pseudo-exponential fashion (as in a thermistor) as the resistive divider will (sort of) compensate in the reverse direction. In order to provide a good solution to the problem we need to know more about the sensor characteristics and the required measurement resolution and accuracy. Tell us more. Best regards, Dave Pic Dude wrote: > > For simplicity, could you not form a voltage divider > w/2 fixed resistors, and the large variable resistor > to be measured placed in parallel across one of the > fixed resistors? Of course you now need some math > since the voltage measured at the AD port is no longer > linearly proportional to the variable resistance. > -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.

Peter, David, Mike, Neil, Thanks for all the replies, folks. From what everybody's advised, I guess the best way to do this would be to use an op-amp to match the impedences to levels at par with the sensor and the AD input. If one is to do this, which would be the best (cheapest, simplest to use) op-amp? The frequency response is not an issue at all. And preferably with a quad configuration, as I need to use this scheme on 3 channels. By the way Neil, Mike was right about your suggestion. I ran the values thru' a spreadsheet, and although the solution looks temptingly simple, the changes in the effective value of the sensor would be too insignificant. Regards, Anand Dhuru {Original Message removed}

LM324 is easy to use and very inexpensive. Paul {Quote hidden}> -----Original Message----- > From: pic microcontroller discussion list > [RemoveMEPICLISTKILLspamMITVMA.MIT.EDU]On Behalf Of Anand Dhuru > Sent: Friday, June 14, 2002 7:48 AM > To: PICLISTSTOPspamspam_OUTMITVMA.MIT.EDU > Subject: Re: [PIC]:strange analog in problem > > > Peter, David, Mike, Neil, > > Thanks for all the replies, folks. From what everybody's advised, I guess > the best way to do this would be to use an op-amp to match the > impedences to > levels at par with the sensor and the AD input. If one is to do > this, which > would be the best (cheapest, simplest to use) op-amp? The > frequency response > is not an issue at all. And preferably with a quad configuration, > as I need > to use this scheme on 3 channels. > > By the way Neil, Mike was right about your suggestion. I ran the values > thru' a spreadsheet, and although the solution looks temptingly > simple, the > changes in the effective value of the sensor would be too insignificant. > > Regards, > > Anand Dhuru > > > > ----- Original Message ----- > From: "David Minkler" <spamBeGoneMinkSTOPspamEraseMELUXTRON.COM> > To: <KILLspamPICLISTspamBeGoneMITVMA.MIT.EDU> > Sent: Thursday, June 13, 2002 9:46 PM > Subject: Re: [PIC]:strange analog in problem > > > > Hi, > > The problem with these voltage divider schemes is that you will only be > > able to use a comparatively small fraction of the ADC range thereby > > limiting your measurement resolution. Adding additional "parallel (in > > the Thevenin sense)" resistors to the network without scaling the > > network to compensate will only make the problem worse. The voltage > > non-linearity of these resistive networks may actually turn out to be a > > benefit if the sensor changes its resistance in an exponential or > > pseudo-exponential fashion (as in a thermistor) as the resistive divider > > will (sort of) compensate in the reverse direction. > > > > In order to provide a good solution to the problem we need to know more > > about the sensor characteristics and the required measurement resolution > > and accuracy. Tell us more. > > > > Best regards, > > Dave > > > > Pic Dude wrote: > > > > > > For simplicity, could you not form a voltage divider > > > w/2 fixed resistors, and the large variable resistor > > > to be measured placed in parallel across one of the > > > fixed resistors? Of course you now need some math > > > since the voltage measured at the AD port is no longer > > > linearly proportional to the variable resistance. > > > > > > > > > > > -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email EraseMElistservEraseMEmitvma.mit.edu with SET PICList DIGEST in the body