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'[PIC]:Reset cause decoder'
2000\11\15@081755 by Morgan Olsson

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Somebody have probably already written a routine to run after reset to decode what coused th routine, like:

If it was Watchdog reset goto WatchdogRecoveryHandler
If it was power on...
If it was brown out reset...
If it was....

Such routine might be time consuming to validate, so if somebody have tested working code i would appreciate that.

It might be in an archive somewhere i have not found?

And then there are those things to think about, i beliave, like not go ahead to load setup from EEPROM if it was a reset during EEPROM write and is still writing...

Hmm... i should have checksum handling for EEPROM...

/Morgan
Morgan Olsson                   spam_OUTmorgans.rtTakeThisOuTspamtelia.com
Morgans Reglerteknik, Hällekås, 277 35 KIVIK, SWEDEN
   tel +46(0)414-446620, fax +46(0)414-672324

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2000\11\15@085544 by Bob Ammerman

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> Hmm... i should have checksum handling for EEPROM...

Or just first write an 'EEPROM' is invalid flag to eeprom before changing
it, and then clearing the invalid flag when the write completes.

On reset, if the 'invalid' flag is set you have to completely reinit the
related data in eeprom.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\11\15@104204 by Morgan Olsson

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Hej Bob Ammerman. Tack för ditt meddelande 14:47 2000-11-15 enligt nedan:
>> Hmm... i should have checksum handling for EEPROM...
>
>Or just first write an 'EEPROM' is invalid flag to eeprom before changing
>it, and then clearing the invalid flag when the write completes.
>
>On reset, if the 'invalid' flag is set you have to completely reinit the
>related data in eeprom.

Good idea.

Anyway, i feel a bit uneasy about the EEPROM updating; what if i get an brown out reset while updating a multibyte definition...  I have to read the supply voltage and not start writing if it is too low, so the the supply will have enougth power in caps if a power problem occours durig EEPROM update.  Well I need to monitor supply anyway because of other reasons, and the F877 ADC is good for that.

Regards
/Morgan

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2000\11\15@121803 by Simon Nield

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morgan:
>Anyway, i feel a bit uneasy about the EEPROM updating; what if i get an brown out reset while
updating a...

i do the same thing as bob for updating eeprom / 'flash'. that lets you know if a whole write
sequence completed ok.

the other thing i do is check each byte after i have written it - i can then detect any errors and
decide what to do about them... in my system i only update the data infrequently, by user
intervention, so i can just tell the user that the write to address NNNN failed. the user can then
try again or put the system in the bin or whatever...


Regards,
Simon

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2000\11\15@125541 by Olin Lathrop

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>>
Anyway, i feel a bit uneasy about the EEPROM updating; what if i get an
brown out reset while updating a multibyte definition...  I have to read the
supply voltage and not start writing if it is too low, so the the supply
will have enougth power in caps if a power problem occours durig EEPROM
update.  Well I need to monitor supply anyway because of other reasons, and
the F877 ADC is good for that.
<<

Add a checksum to the EEPROM that gets updated last.  On read, you re-init
with hard coded defaults (or whatever) if the EEPROM appears to be invalid.
You also get the first time initialization handled for free.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, .....olinKILLspamspam@spam@cognivis.com, http://www.cognivis.com

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2000\11\15@130546 by Alice Campbell

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OK Morgan,
Here is a working parser.  it assumes WDT is on, but dont do
anything to clear it till after the parser is finished.  i
get a lot of race loops if i forget.  dont initialize
anything either. just parse out the various flags and figure
out why the reset occurred.  This one traps WDT, MCLR, Cold
boot, warm boot, deliberate timeouts, sleep, and other things.

Reqires a flag register called mflag here.
This router dumps all mystery states to the wmbt routine
which initializes everything and puts selected registers on
the rs232 output line for analysis.

alice


{Quote hidden}

;;
org     0
nop
;       goto    top
;       org     0x004
top
call   init
CLRF   PORTA
CLRF   PORTC
clrf   PORTB
;       clrf    mflag   ;for debugging purposes especially simulator
;parse the big guys
btfsc   status,TO      ;status,4
GOTO    TO1            ;to=1 wmbt or startup
GOTO    TO0            ;to=0 wdt in sleep or wdt

TO0    btfss   status,PD      ;this actually is used
goto    wmbt           ;to=0 pd=0 reset+clrwdt
goto    wozat            ;to=0 pd=1 wdt

TO1    btfss   status,PD      ;hello? hello?
goto    main            ;to=1 pd=1 powerup
goto    wmbt            ;to=1 pd=0 sleeeeeeeep

;parse out the flags next
;sort of a state machine i guess
wotrst  btfsc   mflag,0         ;mclr+sleeping? not done, dump
       goto    wmbt;zzz           ;decrement lsb of sleep or
continue

t_6      btfsc   mflag,6         ;err goes to dump
       goto    wmbt            ;dont clear this in wmbt
t_7      btfsc   mflag,7         ;decrement sleep loop
       goto    woof
t_0      btfsc   mflag,0         ;main sleep
       goto    zzzz
t_2      btfsc   mflag,2          ; during readout
       goto    mopup            ;restore old address and goto
readlp
t_1      btfsc    mflag,1         ;flag for end of write loop
       goto    disp
t_4      btfsc   mflag,4                ;setup area
       goto    loopw
t_5     btfsc   mflag,5
       goto    loopw
dunno   goto    wmbt    ;dont know why were here

;))))))))main starts((((((((

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