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'[PIC]: writing TRIS/OPT reg's on 16F84?'
2000\08\04@040849 by David D Snyder Hale

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Hi,

I've always used the tris and option commands for 16F84, ignoring the
warning message, "Use of this instruction not recommended."  Now, I
thought I'd do it the recommended way by bank switching and writing the
registers directly.

I select bank1 (bsf STATUS,RP0), then try to write a value to TRISA, TRISB
or OPTION_REG.  However, in each case I receive the error, "Register in
operand not in bank 0. Ensure that bank bits are correct."

Note that the tris & option reg's appear to be getting set properly, but I
don't think these messages are right.  Anyone know what's going on here?

As a demonstration, consider Example 5-1 from the Microchip data manual
for PIC16F8X...

MPASM 02.30 Released EX5-1.ASM 8-4-2000 0:32:39 PAGE 1
LOC OBJECT CODE LINE SOURCE TEXT
 VALUE
               00001 include "p16F84.inc"
               00001 LIST
               00002 ; P16F84.INC Standard Header File, Version 2.00 Microchip Technology, Inc.
               00136 LIST
2007 3FF1       00002 __config _XT_OSC & _WDT_OFF & _PWRTE_ON
               00003
0000 0185       00004 clrf PORTA
0001 1683       00005 bsf STATUS,RP0
0002 300F       00006 movlw 0x0F
Message[302]: Register in operand not in bank 0.  Ensure that bank bits are correct.
0003 0085       00007 movwf TRISA
               00008
               00009 end


thanks,

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(626) 568-0304                        http://isi.mtwilson.edu
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2000\08\04@041513 by Justin Grimm

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Hi
This is not an error, but a warning to ensure the bits are correctly set
Justin
----- Original Message -----
From: David D Snyder Hale <.....davidKILLspamspam@spam@ISI9.MTWILSON.EDU>
To: <PICLISTspamKILLspamMITVMA.MIT.EDU>
Sent: Friday, August 04, 2000 3:57 PM
Subject: [PIC]: writing TRIS/OPT reg's on 16F84?


{Quote hidden}

Microchip Technology, Inc.
>                 00136 LIST
> 2007 3FF1       00002 __config _XT_OSC & _WDT_OFF & _PWRTE_ON
>                 00003
> 0000 0185       00004 clrf PORTA
> 0001 1683       00005 bsf STATUS,RP0
> 0002 300F       00006 movlw 0x0F
> Message[302]: Register in operand not in bank 0.  Ensure that bank bits
are correct.
{Quote hidden}

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2000\08\04@093451 by Ravi

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Hi David,

> <snip>

>
> I select bank1 (bsf STATUS,RP0), then try to write a value to TRISA, TRISB
> or OPTION_REG.  However, in each case I receive the error, "Register in
> operand not in bank 0. Ensure that bank bits are correct."

After you change the bank... bsf status,rp0, instead of writing to TRISA
or TRISB, write to PORTA or
PORTB. You will not get the message.

Regards

Pailoor

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2000\08\04@100020 by Bob Ammerman

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----- Original Message -----
From: David D Snyder Hale <EraseMEdavidspam_OUTspamTakeThisOuTISI9.MTWILSON.EDU>
To: <PICLISTspamspam_OUTMITVMA.MIT.EDU>
Sent: Friday, August 04, 2000 3:57 AM
Subject: [PIC]: writing TRIS/OPT reg's on 16F84?


{Quote hidden}

MPASM doesn't know you've set the bank right, and it always complains about
this. If you trust yourself to get it right you just need to add the line:

   errorlevel -302

in your source file. This will shut MPASM up.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\08\04@131734 by Olin Lathrop

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> > I select bank1 (bsf STATUS,RP0), then try to write a value to TRISA,
TRISB
> > or OPTION_REG.  However, in each case I receive the error, "Register in
> > operand not in bank 0. Ensure that bank bits are correct."
>
> After you change the bank... bsf status,rp0, instead of writing to TRISA
> or TRISB, write to PORTA or
> PORTB. You will not get the message.

No, please don't do that!  MPASM always warns you whenever you try to access
a register that is not in bank 0, whether this is the correct thing to do in
your code or not.  It still generates the correct code.  You can disable
warnings or some warnings as someone else already suggested.  I use a
wrapper around MPASM that, among many other things, filters out selective
warnings.

Writing to PORTA instead of TRISA only works because PORTA is in the same
location in bank 0 as TRISA is within its bank.  The same code will be
generated but MPASM won't issue the warning because it thinks you are
intending to write into bank 0.  However, this leaves a big mess in the
source code that might cause major headaches in the future when the code is
modified, ported, or whatever.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, @spam@olinKILLspamspamcognivis.com, http://www.cognivis.com

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2000\08\05@003538 by Ravi Pailoor

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Olin Lathrop wrote:

> > After you change the bank... bsf status,rp0, instead of writing to TRISA
> > or TRISB, write to PORTA or
> > PORTB. You will not get the message.
>
> No, please don't do that!  MPASM always warns you whenever you try to access
> a register that is not in bank 0, whether this is the correct thing to do in
> your code or not.

<snip>

>  However, this leaves a big mess in the
> source code that might cause major headaches in the future when the code is
> modified, ported, or whatever.

Not if you make it a habit of using this method. I have used this method for the
past 5 years and never had a problem when porting the code up or down.

regards

Pailoor
--
Ravi Pailoor
Managing Director
e-CHIP INFOTEK (P) LTD
Member-Microchip consultant program #230-240
INDIA

AIM : "ravipailoor"

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2000\08\05@145030 by Chamberlain

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David. I replied to one of these not long ago. In Mpasm, set Warning level
to 'Errors only'. I had the same problem. There is no problem.

Chris Chamberlain.
{Original Message removed}

2000\08\05@150701 by Olin Lathrop

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> >  However, this leaves a big mess in the
> > source code that might cause major headaches in the future when the code
is
> > modified, ported, or whatever.
>
> Not if you make it a habit of using this method. I have used this method
for the
> past 5 years and never had a problem when porting the code up or down.

That's your business as long as you are the only one to ever deal with the
source code.  This practise could lead to major headaches and maintenance
cost when someone else has to pick up your code after you've left the
project, got run over by a truck, or whatever.

Do you also use the bank 0 aliases for all the other special function
registers that are in other banks?  Many of them don't map to intuitive
registers that might "remind" someone of the true intended target register.
What about your own variables in banks 1 and up?


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, RemoveMEolinTakeThisOuTspamcognivis.com, http://www.cognivis.com

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2000\08\06@012004 by Ravi Pailoor

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Olin Lathrop wrote:

> > >  However, this leaves a big mess in the
> > > source code that might cause major headaches in the future when the code
> is
> > > modified, ported, or whatever.
> >
> > Not if you make it a habit of using this method. I have used this method
> for the
> > past 5 years and never had a problem when porting the code up or down.
>
> That's your business as long as you are the only one to ever deal with the
> source code.  This practise could lead to major headaches and maintenance
> cost when someone else has to pick up your code after you've left the
> project, got run over by a truck, or whatever.

I fully agree with you on this.

> Do you also use the bank 0 aliases for all the other special function
> registers that are in other banks?  Many of them don't map to intuitive
> registers that might "remind" someone of the true intended target register.
> What about your own variables in banks 1 and up?

Ok..instead of writing to PORTA or PORTB, you can define TRISA equ 05
and TRISB
equ 06 instead of 85 and 86 and use TRISA and TRISB instead of PORTA and
PORTB.
The same holds good for other SFR's and GPR's.

Setting MPLAB to give error messages only may lead to one more problem.

For example in the code where you want to decrement the contents of a
register
and transfer the value into the W register...

   DECF register

and you have left out the destination W. By default the result will go
into the
same register and since warnings are disabled, you will end up with a
bug.

So the best bet is to have warnings and errors enables and look into
each
warning or error and fix it.

My suggestion was only a method to eliminate the routine warning message
appearing
when working with registers in the other bank.

I am not asking anyone to follow this method as a rule.

Regards

Pailoor

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2000\08\06@043005 by Lee Jones

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>>>>  However, this leaves a big mess in the source code that
>>>> might cause major headaches in the future when the code
>>>> is modified, ported, or whatever.

>>> Not if you make it a habit of using this method. I have used
>>> this method for the past 5 years and never had a problem when
>>> porting the code up or down.

>> That's your business as long as you are the only one to ever
>> deal with the source code.

I also agree with this sentiment.


>> Do you also use the bank 0 aliases for all the other special
>> function registers that are in other banks?  Many of them
>> don't map to intuitive registers that might "remind" someone
>> of the true intended target register.  What about your own
>> variables in banks 1 and up?

> Ok..instead of writing to PORTA or PORTB, you can define
> TRISA equ 05 and TRISB equ 06 instead of 85 and 86

Why redefine variables that are already in the include files?

In
       bsf status, rp0   ; select bank 1
       movwf trisa

the warning is being generated because the file register address
operand was wider than 7 bits field in the movwf instruction.

You can fix this problem and, at the same time, include a clue
as to your intentions by the following:

       bsf status, rp0                 ; select bank 1
       movlw some-bit-pattern
       movwf ( trisa ^ 0x80 )          ; style 1
       movwf ( trisa & ~0x80 )         ; style 2
       movwf ( trisa & 0x7F )          ; style 3
       bcf status, rp0                 ; back to bank 0
       movlw some-value
       movwf porta

All 3 styles clear the high order bit in the file register
address operand.  The warning message is no longer emitted as
there is no longer anything "wrong".  Visually, as you read
the code, if the operand has a 0x80 next to it, I know that
I should be working in bank 1.

I personally prefer style 1 using XOR.  That way, if the high
order bit in the operand is already zero (e.g. porta ^ 0x80 ),
then the warning 302 message gets generated and the assembler
helps me to catch the error.

                                               Lee

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2000\08\06@050817 by Oliver Broad

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I think this method can be improved even further. Say you define a compiler
variable B and set it to 00 when ever you clear the bank bit, set it to 0x80
when you set the bank bit. Then ALWAYS end address operands with ^B (except
for registers common to both banks).

The assembler will now issue 'correct' warnings.

{Original Message removed}

2000\08\06@084751 by Bob Ammerman

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>         movwf ( trisa ^ 0x80 )          ; style 1
>         movwf ( trisa & ~0x80 )         ; style 2
>         movwf ( trisa & 0x7F )          ; style 3

Excellent idea. I too vote for style 1.  How about including it in a macro:

#define INBANK1(x)  ((x) ^ 0x80)

   movwf    INBANK1(trisa)

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\08\07@122920 by Harold M Hallikainen

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       If you eventually port up to the 18c series, there'll be a problem since
the PORT and TRIS registers are all in the same bank.

Harold



On Sat, 5 Aug 2000 13:49:51 -0400 Olin Lathrop
<TakeThisOuTolin_piclistEraseMEspamspam_OUTCOGNIVIS.COM> writes:
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