Searching \ for '[PIC]: tri-state Pic pin, how?' in subject line. ()
Make payments with PayPal - it's fast, free and secure! Help us get a faster server
FAQ page: www.piclist.com/techref/microchip/devices.htm?key=pic
Search entire site for: 'tri-state Pic pin, how?'.

Exact match. Not showing close matches.
PICList Thread
'[PIC]: tri-state Pic pin, how?'
2000\09\07@034342 by Graham North

flavicon
face
Hi all,

I've read a lot about making/leaving pic pins tri-state for one reason or
another lately, but I don't know how to do it!  Can it be done on all pics,
or just a few?  I have mainly use 16F84, 12C508 and 17C43.  When reading I
do agree with some of the benefits, and so would like to try it.

Could someone enlighten me?

Regards
Graham North

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
use spam_OUTlistservTakeThisOuTspammitvma.mit.edu?body=SET%20PICList%20DIGEST>

2000\09\07@043407 by Mark Willis

flavicon
face
204.210.50.240/techref/default.asp?from=/techref/piclist/&url=begin.htm
is a good page to read;  Item 11 isn't all that verbose, though, is it?
<G>  Do we need to work on that?  Uh, James, how about hot-linking item
11 to
204.210.50.240/techref/default.asp?from=/techref/microchip/&url=tris.htm,
please?

TRIS used to be THE way to set I/O pin direction, now MicroChip says
repeatedly, "Don't use TRIS, it won't be supported necessarily in future
chips" - so read the datasheet on those parts to check <G>

Usually, on Reset, all I/O pins are set as inputs (Gotcha here - use a
pullup or pulldown so your devices don't act in "unpleasant ways" when
your chip resets, you want a pull-down if using a logic-level Power FET
or an NPN power Darlington or SCR that fires on a logic high input, or a
pull-up if using a PNP transistor to do something safety-critical, of
course - floating pins are a BAD idea if safety's at stake.  This isn't
a problem for an indicator LED;  if it flashes on power-up, you probably
won't notice the 10 microsecond flash <G>  On the other hand if you have
your ejector seat fire just because of a power glitch in the ejector
seat controller you're making, you'll NOT be well liked by the pilot.)

You then set the TRIS bits for 0's for the port pins you want to write
to;  i.e. setting TrisB to '11110000'B would leave RB7..RB4 as inputs
but make RB3..RB0 outputs.

I find MicroChip's warning in advance good mostly, but wish it were
always coupled in the datasheets with the "here's the way we want this
done", you'd think the solution should get equal time?  <G>  "In place
of a TRIS command, use a MOVWF TRIS(A,B,etc) assuming that W is loaded
with the desired mask. You also need to switch to bank 1 before doing
the
movwf command, where the tris addresses then match the port addresses."
is the now-preferred solution;  If you just do this when Bank 1's
already selected, no extra Bank Switch is needed...

The TRIS bits are 'usually' write-only;  you usually know how you last
left them set <G>  (I think always write-only but haven't checked!)

And watch out for those dang Read-Modify-Write problems.  They're sneaky
and love to bite us all.

 Mark

Graham North wrote:
{Quote hidden}

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
use .....listservKILLspamspam@spam@mitvma.mit.edu?body=SET%20PICList%20DIGEST>

2000\09\07@045313 by xandinho

flavicon
face
>I find MicroChip's warning in advance good mostly, but wish it were
>always coupled in the datasheets with the "here's the way we want this
>done", you'd think the solution should get equal time?  <G>  "In place
>of a TRIS command, use a MOVWF TRIS(A,B,etc) assuming that W is loaded
>with the desired mask. You also need to switch to bank 1 before doing

       Microchip doesn't make the MPASM? So include a simple macro to substitute TRIS for the apropriate set of commands.


--------------8<-------Corte aqui-------8<--------------

       All the best!!!
       Alexandre Souza
       xandinhospamKILLspaminterlink.com.br

--------------8<-------Corte aqui-------8<--------------

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
use .....listservKILLspamspam.....mitvma.mit.edu?bodyT%20PICList%20DIGEST>

2000\09\07@081056 by Bob Ammerman

picon face
Some PICs have a TRIS instruction. You load a bitmask into the W register
then say, for example "TRIS PORTA".

Other PICs have SFR's called TRISA, TRISB, etc. These are often in bank 1.

Some PICs even allow both the TRIS instruction and the use of the TRIS
registers.

Pins corresponding to zeros in the bitmask become outputs. Those
corresponding to ones become inputs.

The inputs are effectively tri-stated because they are no longer driving the
pin. This allows an external device to drive the pin instead.

Note that Microchip has deprecated the use of the TRIS instruction on those
chips that also support the TRISx SFR's. This is because the
'wave-of-the-future' is the SFR-only way.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2000\09\07@090716 by Olin Lathrop

flavicon
face
> I find MicroChip's warning in advance good mostly, but wish it were
> always coupled in the datasheets with the "here's the way we want this
> done", you'd think the solution should get equal time?  <G>  "In place
> of a TRIS command, use a MOVWF TRIS(A,B,etc) assuming that W is loaded
> with the desired mask. You also need to switch to bank 1 before doing
> the
> movwf command, where the tris addresses then match the port addresses."
> is the now-preferred solution;  If you just do this when Bank 1's
> already selected, no extra Bank Switch is needed...

Please, no!  If they followed that logic all throughout, each data sheet
would be filled with vast quantities of redundant information.  That would
make it too hard to get the unique information out of each data sheet
because you'd have to wade thru all this stuff you've already been told ten
times.

In fact I wish Microchip included a little compatibility information at the
front of the description for each peripheral.  I'd like something that tells
me "Yes, just like you probably guessed, this is the same USART as used on
the other xxxx chips", or "this is almost like the USART on the xxxx chips,
except <very brief mention of differences>".  The normal description would
then follow, which I can then read for the first time or just look up the
differences mentioned if I've used one of the xxxx chips before.

> The TRIS bits are 'usually' write-only;  you usually know how you last
> left them set <G>  (I think always write-only but haven't checked!)

No, you can read and write the TRISx registers.  They are only write-only on
the old cores where the TRIS instruction is the only access to the TRIS
state.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, EraseMEolinspam_OUTspamTakeThisOuTcognivis.com, http://www.cognivis.com

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
use listservspamspam_OUTmitvma.mit.edu?body=SET%20PICList%20DIGEST>

2000\09\07@115505 by jamesnewton

face picon face
Done, thanks for the input.

---
James Newton (PICList Admin #3)
@spam@jamesnewtonKILLspamspampiclist.com 1-619-652-0593
PIC/PICList FAQ: http://www.piclist.com or .org

{Original Message removed}

More... (looser matching)
- Last day of these posts
- In 2000 , 2001 only
- Today
- New search...