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'[PIC]: tmr0 on 16F84 interrupt period'
2001\04\27@002528 by Nick Veys

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Just double checking this.  At 4MHz, the timer will interrupt every:
256((2^(prescaler+1)/(2^22)) seconds.  So with a 0 prescalar you'll be
getting an interrupt every: 256(2/(2^22)) seconds (122us)?  This appears to
be the smallest obtainable period with this clock speed.  If anyone can
confirm this, it'd be much appreciated!!

Also, if someone has a better timer interrupt reference than the 16F84 data
sheet, I'd appreciate that too.  The datasheet merely says 1:2 .. 1:256
prescalars are available and I only assume that means clock/2^(prescale+1).

Thanks!

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2001\04\27@054832 by Roman Black

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Nick Veys wrote:
>
> Just double checking this.  At 4MHz, the timer will interrupt every:
> 256((2^(prescaler+1)/(2^22)) seconds.  So with a 0 prescalar you'll be
> getting an interrupt every: 256(2/(2^22)) seconds (122us)?  This appears to
> be the smallest obtainable period with this clock speed.  If anyone can
> confirm this, it'd be much appreciated!!
>
> Also, if someone has a better timer interrupt reference than the 16F84 data
> sheet, I'd appreciate that too.  The datasheet merely says 1:2 .. 1:256
> prescalars are available and I only assume that means clock/2^(prescale+1).


Hi Nick, no you can assign the prescaler to WDT,
then the timer0 will inc with every instruction,
ie, 1:1 ratio. It will interrupt on overflow
every 256 instructions.

The 16C84 manual has a lot of data not in the
16F84 or 16F84A datasheets. It has some nice
diagrams about the ints and timer0 int latency.
You can download from this page:

http://www.ezy.net.au/~fastvid/16c84_man.pdf
(right click on link to download it)
-Roman

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2001\04\27@082531 by Drew Vassallo

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>Just double checking this.  At 4MHz, the timer will interrupt every:
>256((2^(prescaler+1)/(2^22)) seconds.  So with a 0 prescalar you'll be
>getting an interrupt every: 256(2/(2^22)) seconds (122us)?  This appears to
>be the smallest obtainable period with this clock speed.  If anyone can
>confirm this, it'd be much appreciated!!

No, actually at 4MHz, TMR0 will interrupt every 256us with a 1:1 prescaler.

>sheet, I'd appreciate that too.  The datasheet merely says 1:2 .. 1:256
>prescalars are available and I only assume that means clock/2^(prescale+1).

The datasheet says that the minimum prescale value for TMR0 is 1:2 when
assigned to TMR0.  To achieve a 1:1 scale for TMR0, assign the prescaler to
the WDT instead of TMR0.

--Andrew

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2001\04\27@083540 by Olin Lathrop

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> Just double checking this.  At 4MHz, the timer will interrupt every:
> 256((2^(prescaler+1)/(2^22)) seconds.  So with a 0 prescalar you'll be
> getting an interrupt every: 256(2/(2^22)) seconds (122us)?  This appears
to
> be the smallest obtainable period with this clock speed.  If anyone can
> confirm this, it'd be much appreciated!!

I didn't follow where you got your numbers from.  But, the fastest free
running timer 0 interrupt will be every 256 instructions, which is every
256uS with a 4MHz oscillator.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, spam_OUTolinTakeThisOuTspamembedinc.com, http://www.embedinc.com

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2001\04\27@090243 by James Paul

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Nick,

If you have no prescaler and you write 255 to the TMR0 register,
you can get an interrupt in 3us I believe.  It may be slightly
more than that, but not much.   I get this from the fact that
writing a value (255) to TMR0 means the next clock will overflow
it.   But, since you wrote to it, there is a two cycle delay before
it increments again because it has to synchronize.  Therefore 3us.
If this is wrong, I'm sure someone will correct me.  I'm recalling
this from memory because I don't have the datasheet in front of me.
So don't be too harsh if I'm not completely correct.

                                         Regards,

                                            Jim


On Thu, 26 April 2001, Nick Veys wrote:

{Quote hidden}

.....jimKILLspamspam@spam@jpes.com

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2001\04\27@093135 by Bob Ammerman

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James,

You have the right idea here.

The better idea is to ADD a value to TMR0 in your interrupt handler.  This
avoids issues with interrupt timing jitter.

Assuming no prescaler, the actual interrupt rate will be every:

   256 - (Value_Added - 2)

Instructions.

One particularly useful case:

   movlw    8
   addwf    TMR0

This will result in an interrupt every 250 instructions (250 uSec at 4MHz
clock, or exactly 4000 interrupts per second).

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)


{Original Message removed}

2001\04\27@124740 by Nick Veys

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Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the processor.
If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
prescalar and an interrupt every ~244us.  Now I know that I can add to that
value to speed it up so that's good, but my one problem with this is, I
don't want to use the Watchdog timer... If I have it disabled but still
assign the prescalar to the watchdog, will it be disabled?  The /only/
interrupt I want is the tmr0 one.

{Quote hidden}

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2001\04\27@132259 by James Paul

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Nick,

If the prescaler is not assigned to TMR0, then TMR0 will be at 1:1.
If it is assigned to the WD timer, but the WD timer is not used,
then there are no consequences.

                                            Regards,

                                              Jim



On Fri, 27 April 2001, Nick Veys wrote:

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2001\04\27@132308 by promero

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part 0 44 bytes
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Nick Veys wrote:

> Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the processor.
> If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
> prescalar and an interrupt every ~244us.

if you are using TMR0 as a free running timer (without prescaler), then it will
set its interrupt flag every 256 us

> Now I know that I can add to that
> value to speed it up so that's good, but my one problem with this is, I
> don't want to use the Watchdog timer... If I have it disabled but still
> assign the prescalar to the watchdog, will it be disabled?  The /only/
> interrupt I want is the tmr0 one.
>

As long as you keep the watchdog timer disabled, you will never get a WDT reset.

{Quote hidden}


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part 3 154 bytes
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2001\04\27@132312 by michael brown

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----- Original Message -----
From: "Nick Veys" <EraseMEnickspam_OUTspamTakeThisOuTVEYS.COM>
To: <PICLISTspamspam_OUTMITVMA.MIT.EDU>
Sent: Friday, April 27, 2001 11:45 AM
Subject: Re: [PIC]: tmr0 on 16F84 interrupt period


> Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the
processor.
> If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
> prescalar and an interrupt every ~244us.  Now I know that I can add to
that
> value to speed it up so that's good, but my one problem with this is, I
> don't want to use the Watchdog timer... If I have it disabled but still
> assign the prescalar to the watchdog, will it be disabled?  The /only/
> interrupt I want is the tmr0 one.

   By default after power on, the prescaler is assigned to WDT (OPTION_REG
is initialized to all ones after POR).  Changing assignment(OPTION_REG, PSA)
or value(OPTION_REG PS0,PS1,PS2) of prescaler does not affect whether WDT is
enabled. If the config bit is set during programming  so that WDT is
disabled(WDTE cleared), then it is disabled.<-(period)  By the way, in terms
of TMR0 the prescaler cannot be set to one. Once it is assigned to TMR0, the
prescaler is automatically at least two (with all bits cleared).  The way it
is set to one is by assigning it to the WDT.  In which case you should
receive an interrupt roughly every 256 us from TMR0. Provided that you
re-enable them everytime, that is.  :-)  If you write to TMR0 then it will
not start incrementing for two machine cycles.

{Quote hidden}

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2001\04\27@133010 by Nick Veys

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Excellent, thanks to all who helped clear this up for me!

{Quote hidden}

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2001\04\27@135713 by Bob Ammerman

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----- Original Message -----
From: "Nick Veys" <RemoveMEnickTakeThisOuTspamVEYS.COM>
To: <spamBeGonePICLISTspamBeGonespamMITVMA.MIT.EDU>
Sent: Friday, April 27, 2001 12:45 PM
Subject: Re: [PIC]: tmr0 on 16F84 interrupt period


> Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the
processor.
> If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
> prescalar and an interrupt every ~244us.  Now I know that I can add to
that
> value to speed it up so that's good, but my one problem with this is, I
> don't want to use the Watchdog timer... If I have it disabled but still
> assign the prescalar to the watchdog, will it be disabled?  The /only/
> interrupt I want is the tmr0 one.

Yes it will be disabled.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2001\04\27@135926 by Drew Vassallo

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>Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the
>processor.
>If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
>prescalar and an interrupt every ~244us.  Now I know that I can add to that

Where are you getting these numbers (i.e. ~244us)?  Like I said, the
interrupt will occur every 256us at 4MHz.  There's no approximation, no
guesswork.  It's 256us.  4Mhz/4 (quadrature) = 1MHz per cycle.  1/1,000,000
= 1us per cycle.  TMR0 ranges from 0-255 (256 steps).  256*1us per cycle =
256us.

>value to speed it up so that's good, but my one problem with this is, I
>don't want to use the Watchdog timer... If I have it disabled but still
>assign the prescalar to the watchdog, will it be disabled?  The /only/
>interrupt I want is the tmr0 one.

This is fine.  If you disable the WDT, it's off.  Doesn't matter what you
assign to it for value, prescale, whatever.  It's disabled.  Check the
datasheet... the 16F84 has a pretty decent datasheet if I remember
correctly.

--Andrew

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2001\04\27@180545 by Olin Lathrop

face picon face
> Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the
processor.
> If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
> prescalar and an interrupt every ~244us.

256uS actually.  How on earth did you get 244us?

> Now I know that I can add to that
> value to speed it up so that's good, but my one problem with this is, I
> don't want to use the Watchdog timer... If I have it disabled but still
> assign the prescalar to the watchdog, will it be disabled?

You really need to so some manual reading.  Check out the section about
assigning the prescaler to the watchdog timer.  What does it say, if
anything, about the assignment effecting whether the watchdog is enabled or
not?  Read the watchdog timer section.  What if anything does it say about
the watchdog enable being effected by the prescaler assignment?  Also read
the section on the configuration bits.  If you still have questions after
doing this homework, I'll try to help.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, TakeThisOuTolinEraseMEspamspam_OUTembedinc.com, http://www.embedinc.com

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2001\04\27@181625 by Nick Veys

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> > Ok, so I have the clock coming in @ 4MHz, effectively 1MHz to the
> processor.
> > If I set the prescalar to 1 and assign it to the WDT I'll get a 1:1
> > prescalar and an interrupt every ~244us.
>
> 256uS actually.  How on earth did you get 244us?

Heh, been doing binary math for the past two weeks and my brain was stuck on
Meg = 2^20 :)  10^6 is much easier and makes more sense, glad you guys
corrected me on that one...

{Quote hidden}

16F84 manual doesn't even have the bit settings for the prescalars, I had to
assume the values, although it was in the mid-range reference manual... It
also says nothing about the watchdog timer being affected by the prescalar
assignment, it's absolutely terrible in it's information actually... I don't
ask until I've tried all other avenues :)

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2001\04\27@192351 by michael brown

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----- Original Message -----
From: "Nick Veys" <RemoveMEnickspamTakeThisOuTVEYS.COM>
To: <PICLISTEraseMEspam.....MITVMA.MIT.EDU>
Sent: Friday, April 27, 2001 5:13 PM
<SNIP>
> 16F84 manual doesn't even have the bit settings for the prescalars, I had
to
> assume the values, although it was in the mid-range reference manual... It
> also says nothing about the watchdog timer being affected by the prescalar
> assignment, it's absolutely terrible in it's information actually... I
don't
> ask until I've tried all other avenues :)

Make sure you have Microchip literature number 35007a (68 pages).  Its all
in there. :-)


>
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>

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2001\04\28@010551 by David W. Gulley

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Nick Veys wrote:
> 16F84 manual doesn't even have the bit settings for the prescalars,
    See datasheet (30430c, and/or 35007a for 16F84A) page 16

> I had to assume the values, although it was in the mid-range
> reference manual... It also says nothing about the watchdog
> timer being affected by the prescalar assignment,
    See datasheet (30430c) pages 27-31, 38, 39, 51

> it's absolutely terrible in it's information actually...
> I don't ask until I've tried all other avenues :)
    Try reading the instructions...

(Appologies if I seem a bit terse, but its been a long week)
David W. Gulley
Destiny Designs

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2001\04\28@080954 by Olin Lathrop

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> 16F84 manual doesn't even have the bit settings
> for the prescalars,

Section 4.2.2.2, page 16, bits 2-0, "Prescaler Rate Select bits".

> It also says nothing about the watchdog timer being
> affected by the prescalar assignment,

Right, that's because it isn't.  You can't expect the manual to list all the
things the chip DOESN'T do, except in some confusing cases where one could
make a reasonable but incorrect assumption.  This is not one of those.

> it's absolutely terrible in it's information actually...

Personally, I find the Microchip documentation quite reasonable.  Of course
it helps to have actually read it.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, EraseMEolinspamembedinc.com, http://www.embedinc.com

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