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'[PIC]: confused about general delay methods!'
2002\04\14@134430 by

Hi!

I4m just starting to learn how to program Microchips microcontrollers so i4m very glad that information sources like the piclist exist.

I found a quite interesting page about delay methods at http://www.piclist.com/techref/microchip/delay/general.htm.

I have a question about method nr. 2 in the article.

Consider the code:

According to the article you will get a total delay of three times the initial value plus three.

DELAY   MOVLW   D'95'           ; 288 cycle delay
MOVWF   COUNTER
DECFSZ  COUNTER,F
GOTO    \$-1

But when I simulate it in MPLAB IDE (using PIC16F872), I just got a 286 cycles of delay! What have went wrong?

Let us give it the initial value of 2, which give us 2*3+3=9 cycles according to the article.

But according to me the "program flow" will be like

MOVLW D'2' ;1 cycle

MOVWF COUNTER ;1 cycle

DECFSZ COUNTER,1 ;1cycle, COUNTER have now the value 1

GOTO \$-1 ; 2 cycle

DECFSZ COUNTER,1 ; 2 cycle, because the result will be 0, this will end the delay loop

A total delay of 7 cycles is what I get. I would like the formula to be 3 * intial_value + 1 instead of 3 * initial_value +3.

I welcome any comments that will bring light to this!

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Hi,

Propaply the two additional cycles are for the call/return instructions so
you know if you call the routine you will have the total delay stated in the
routine.

Haris

{Original Message removed}
On Mon, 15 Apr 2002 18:01:00 +0300, "Haris I. Volos" wrote:

>Hi,
>
>Propaply the two additional cycles are for the call/return instructions so
>you know if you call the routine you will have the total delay stated in the
>routine.
>

That could be true except for the fact that call and return are both
2-cycle instructions.
Used inline, the routine does give a 3*n + 1 cycle delay. Called as a
subroutine, the call and return make it 3*n + 5 cycles total.

The cycle count for the delay routine itself works out as:
1 cycle for the movlw
1 cycle for the movwf
n-1 cycles for the decfsz (while not zero)
2  * n-1 cycles for the goto
2 cycles for the decfsz (when zero)

This totals to 3*(n-1) + 4  cycles = 3 * n + 1 cycles.

Regards, Bob

>
>{Original Message removed}
Perhaps they are counting the return time, which you don't explicitly see in
the calling source code, but not the call time, which _is_ seen in the
calling source code.

Bob Ammerman
RAm Systems

{Original Message removed}
On Mon, 15 Apr 2002 11:50:04 -0400, Bob Ammerman wrote:

>Perhaps they are counting the return time, which you don't explicitly see in
>the calling source code, but not the call time, which _is_ seen in the
>calling source code.
>

Good thought, that's probably it.

Regards, Bob

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----- Original Message -----
From: "Bob Barr" <bbarrCALIFORNIA.COM>
To: <PICLISTMITVMA.MIT.EDU>
Sent: Monday, April 15, 2002 7:22 PM
Subject: Re: [PIC]: confused about general delay methods!
....

> >Propaply the two additional cycles are for the call/return instructions
so
> >you know if you call the routine you will have the total delay stated in
the
> >routine.
> >
>
> That could be true except for the fact that call and return are both
> 2-cycle instructions.
>
....

Thanks for pointing this to me because I am not so experienced with PICS and
I wasn't aware that instructions who change the program counter (such
return/call/goto) need two cycles.

Haris

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On Mon, 15 Apr 2002 22:42:13 +0300, "Haris I. Volos" wrote:

<snip>

>
>Thanks for pointing this to me because I am not so experienced with PICS and
>I wasn't aware that instructions who change the program counter (such
>return/call/goto) need two cycles.
>

Don't forget btfss, btfsc, decfsz, and incfsz. They all take 2 cycles
if they do the skip, but only 1 when they fall through.

And now this discussion's got me wondering about doing operations
directly on PCL. I would think that an operation such as a movwf to
PCL should take 2 cycles but I'm not certain of this. Hmmm, I hadn't

Regards, Bob

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At 02:45 PM 4/15/02 -0700, Bob Barr wrote:

>And now this discussion's got me wondering about doing operations
>directly on PCL. I would think that an operation such as a movwf to
>PCL should take 2 cycles but I'm not certain of this. Hmmm, I hadn't

Yes - any operation where PCL is the destination takes 2 cycles.

dwayne

Dwayne Reid   <dwaynerplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
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On Mon, 15 Apr 2002 17:44:22 -0600, Dwayne Reid wrote:

>At 02:45 PM 4/15/02 -0700, Bob Barr wrote:
>
>>And now this discussion's got me wondering about doing operations
>>directly on PCL. I would think that an operation such as a movwf to
>>PCL should take 2 cycles but I'm not certain of this. Hmmm, I hadn't
>
>Yes - any operation where PCL is the destination takes 2 cycles.
>

Thanks, Dwayne. I thought I had read that somewhere in the Microchip
docs but I didn't see it mentioned when I was posting.

Regards, Bob

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> And now this discussion's got me wondering about doing operations
> directly on PCL. I would think that an operation such as a movwf to
> PCL should take 2 cycles but I'm not certain of this. Hmmm, I hadn't

PCL is not the high byte of PC, just a buffer for it. Writing to PCL does
not affect the PC, so it is one cycle only.

Wouter van Ooijen
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> PCL is not the high byte of PC, just a buffer for it. Writing to PCL does
> not affect the PC, so it is one cycle only.

I think you meant to say PCLATH, not PCL.  Neither of your statements are
true for PCL, but are for PCLATH.

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On Tue, 16 Apr 2002 19:48:30 +0200, wouter van ooijen & floortje
hanneman wrote:

>> And now this discussion's got me wondering about doing operations
>> directly on PCL. I would think that an operation such as a movwf to
>> PCL should take 2 cycles but I'm not certain of this. Hmmm, I hadn't
>
>PCL is not the high byte of PC, just a buffer for it. Writing to PCL does
>not affect the PC, so it is one cycle only.
>

You're correct that writing to PCL is a 1-cycle operation. At least,
according to the MPLAB simulator, it is.

As far as it not affecting the PC: Since writing to PCL takes me to a
new program location hasn't it, by definition, affected the PC to
accomplish this?

Regards, Bob

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> You're correct that writing to PCL is a 1-cycle operation. At least,
> according to the MPLAB simulator, it is.

My mistake: I meant PCLATH. PCL is the lower byte of the PC, and writing to
it definetly
- takes two cycles
- will take you (your program) somewhere else (defined by the value written
to PCL and the current value of PCLATH)

Wouter van Ooijen
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Microchip changed things a few years back - PC got changed to PCL.  The
high byte register is PCLATH.

PC and PCL refer to the same thing: the lower byte of the Program Counter
located at address 0x02.  Any write to PCL (also known as PC) takes 2 clock
cycles to execute.  If the simulator does not reflect this, the simulator
is broken and Microchip needs to be told about it so they can fix it.

Bob - the 2 cycle execution time of any instruction where PCL is modified
is talked about in the instruction set summary portion of the data
sheet.  For the 16F87x series, that is page 135 of document DS30292C

dwayne

At 11:58 AM 4/16/02 -0700, Bob Barr wrote:
{Quote hidden}

Dwayne Reid   <dwaynerplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
(780) 489-3199 voice          (780) 487-6397 fax

Celebrating 18 years of Engineering Innovation (1984 - 2002)
.-.   .-.   .-.   .-.   .-.   .-.   .-.   .-.   .-.   .-
`-'   `-'   `-'   `-'   `-'   `-'   `-'   `-'   `-'
Do NOT send unsolicited commercial email to this email address.
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On Tue, 16 Apr 2002 14:03:22 -0600, Dwayne Reid wrote:

>
>Microchip changed things a few years back - PC got changed to PCL.  The
>high byte register is PCLATH.
>
>PC and PCL refer to the same thing: the lower byte of the Program Counter
>located at address 0x02.  Any write to PCL (also known as PC) takes 2 clock
>cycles to execute.  If the simulator does not reflect this, the simulator
>is broken and Microchip needs to be told about it so they can fix it.
>

Maybe I didn't check it correctly. A 'movlw low(\$+5)' followed by a
'movwf PCL' results in the jump occurring and the stopwatch window
indicating that 1 cycle was used.

>Bob - the 2 cycle execution time of any instruction where PCL is modified
>is talked about in the instruction set summary portion of the data
>sheet.  For the 16F87x series, that is page 135 of document DS30292C
>

where.

Regards, Bob

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Bob Barr wrote:

> Maybe I didn't check it correctly. A 'movlw low(\$+5)' followed by a
> 'movwf PCL' results in the jump occurring and the stopwatch window
> indicating that 1 cycle was used.

movlw 5
movwf PCL

Takes 3 cycles on my MPLAB which is correct.

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On Wed, 17 Apr 2002 08:30:50 +1000, Tony Nixon wrote:

>Bob Barr wrote:
>
>> Maybe I didn't check it correctly. A 'movlw low(\$+5)' followed by a
>> 'movwf PCL' results in the jump occurring and the stopwatch window
>> indicating that 1 cycle was used.
>
>        movlw 5
>        movwf PCL
>
>Takes 3 cycles on my MPLAB which is correct.
>

Ooops, I stand corrected. It does on mine too as long as I don't
inadvertently have the 17C43 device selected.
When simulating with the 16C745 selected, it does show the correct 2
cycles for the 'movwf PCL' instruction. I forgot that I had last been
doing 17C43 simulations.

Regards, Bob

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