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'[PIC]: bank switch instructions.'
2002\08\14@224545 by Deva Seetharam

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face
Hello,
i am using htsoft picc lite compile to generate code for pic 16f84. i see
that compiler doesn't produce the necessary bankswitch instructions
(setting/clearing rp0 bit) while accessing the variables in different
banks.

for instance:
unsigned char bank1 var1;
unsigned char var2;

var1++;
var2++;

for this piece of code, i would like it to issue bank switch instructions
before accessing the variables. i know this is unnecessary as the banks
are shadowd.

the reason why i am asking is:

i am developing an application in 16f84 simulator. after writing the code,
i realize that 68 bytes of ram is insuffcient. i need more memory.
however, i don't have time to change the simulator to simulate a bigger
processor. so, i changed the simulator such that two banks are not
shadowed and there are two separate memory banks. i could access the
correct banks if the rp0 bit is set correctly.

is there any way to force the compiler to generate these bank switch
instructions?

thanks,
Deva Seetharam

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617.666.6674 (h)
617.253.1522 (w)

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20 Ames Street,
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2002\08\15@011654 by Mike Singer

picon face
Hi Deva,
Could you explain, please, why you choose PIC16F84?
Why not other PIC? I'm just wondering.
I'll not comment your choice, since I've got a
shut up command, though in polite manner from one
of List's heavy-weight during the discussion beginner's
choice. "Freedom of speech", you know, is as knotty
problem as 16FXX bank switching.

Mike.


Deva Seetharam wrote:
> Hello,
> i am using htsoft picc lite compile to generate code
> for pic 16f84. i see that compiler doesn't produce
> the necessary bankswitch instructions (setting/c
> learing rp0 bit) while accessing the variables in
> different banks.
.
.
.

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2002\08\15@022818 by Brendan Moran

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Hash: SHA1

Deva,
If you want to avoid bank switching entirely, you can move to a PIC18F
series chip.  Incidentally, the 16F84 is now obsolete.  If that's what you
have available for whatever reason, that's fine, but the 16F628 is a much
more powerful controller, with the same instruction set as the 16F84.

That said, bank switching can be done in any C compiler that supports
inline assembly by using the BCF and BSF instructions.  You should be able
to use something like:

#inline bsf STATUS,RP0
var1++
#inline bcf STATUS,RP1

Now, understand that this is not good code, but it will do in a pinch, just
make sure to fix it later. It is not self documenting, and it would be far
better if you could use bank switch macros or get the compiler to handle it
properly.  Speaking of which, doesn't the C compiler handle switches if you
overrun the amount of RAM available in one bank?

Hope that helps.


At 07:48 AM 15/08/2002 +0300, you wrote:
{Quote hidden}

Mike, on this list, it is difficult some times to tell the difference
between vehemence and anger.  Are you certain that it is a "shut up
command" and not an "I disagree with you"?  For the record, I think that
the 18F parts are great, but they're not as available as many of the 16F
parts.  Note that the OP said that there wasn't enough time to switch to a
larger processor.  I presume that the OP would use a better one under
looser time constraints.

Regards,

- --Brendan
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2002\08\15@085941 by Hu, Luhui

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Hi Brendan,

Do you mean the Mplab C18 can select bank of PIC18F automatically? PLease
give some suggestions how to select banks in the PIC18F using C18!

Thanks in advance

Luke

{Original Message removed}

2002\08\15@091549 by 8859-9?B?1m1lciBZYWxo/Q==?=

As mentioned below, you can use inline assembly to do the bank
switching.  With C18 you write:

       _asm

       ...                     some assembly code here

       _endasm

However, I don't see the need for switching banks.  If you could tell us
what you want to do, maybe there could be another solution to the
problem, with no bank switcing.


Ömer YALHI
.....oyalhiKILLspamspam@spam@teksan.com.tr
http://www.teksan.com.tr
Tel : +90 212 613 22 00
Fax: +90 212 544 70 35


{Original Message removed}

2002\08\15@093249 by Hu, Luhui

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face
I am using PIC18F258, there are about 1.5KB RAM and it ranges from bank0 to
bank5. However I have used up to 1KB RAM for global variables, these
variables cannot be stored in a single bank, such as bank1 or bank2. Thus I
have distributed these variables almost around the whole RAM space. PLease
give me some suggestions how to store these variables! Thanks in advance!

Luke

{Original Message removed}

2002\08\15@110624 by Hu, Luhui

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face
I can select bank in the C18 using linker script and #pramga udata.

Luke

-----Original Message-----
From: Ömer Yalhi [oyalhispamKILLspamTEKSAN.COM.TR]
Sent: Thursday, August 15, 2002 9:17 AM
To: .....PICLISTKILLspamspam.....MITVMA.MIT.EDU
Subject: Re: [PIC]: bank switch instructions.


As mentioned below, you can use inline assembly to do the bank
switching.  With C18 you write:

       _asm

       ...                     some assembly code here

       _endasm

However, I don't see the need for switching banks.  If you could tell us
what you want to do, maybe there could be another solution to the
problem, with no bank switcing.


Ömer YALHI
EraseMEoyalhispam_OUTspamTakeThisOuTteksan.com.tr
http://www.teksan.com.tr
Tel : +90 212 613 22 00
Fax: +90 212 544 70 35


-----Original Message-----
From: pic microcontroller discussion list
[PICLISTspamspam_OUTMITVMA.MIT.EDU] On Behalf Of Hu, Luhui
Sent: Thursday, August 15, 2002 3:55 PM
To: @spam@PICLISTKILLspamspamMITVMA.MIT.EDU
Subject: Re: [PIC]: bank switch instructions.


Hi Brendan,

Do you mean the Mplab C18 can select bank of PIC18F automatically?
PLease give some suggestions how to select banks in the PIC18F using
C18!

Thanks in advance

Luke

-----Original Message-----
From: Brendan Moran [KILLspamannirackKILLspamspamSHAW.CA]
Sent: Thursday, August 15, 2002 2:27 AM
To: RemoveMEPICLISTTakeThisOuTspamMITVMA.MIT.EDU
Subject: Re: [PIC]: bank switch instructions.


-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Deva,
If you want to avoid bank switching entirely, you can move to a PIC18F
series chip.  Incidentally, the 16F84 is now obsolete.  If that's what
you have available for whatever reason, that's fine, but the 16F628 is a
much more powerful controller, with the same instruction set as the
16F84.

That said, bank switching can be done in any C compiler that supports
inline assembly by using the BCF and BSF instructions.  You should be
able to use something like:

#inline bsf STATUS,RP0
var1++
#inline bcf STATUS,RP1

Now, understand that this is not good code, but it will do in a pinch,
just make sure to fix it later. It is not self documenting, and it would
be far better if you could use bank switch macros or get the compiler to
handle it properly.  Speaking of which, doesn't the C compiler handle
switches if you overrun the amount of RAM available in one bank?

Hope that helps.


At 07:48 AM 15/08/2002 +0300, you wrote:
{Quote hidden}

Mike, on this list, it is difficult some times to tell the difference
between vehemence and anger.  Are you certain that it is a "shut up
command" and not an "I disagree with you"?  For the record, I think that
the 18F parts are great, but they're not as available as many of the 16F
parts.  Note that the OP said that there wasn't enough time to switch to
a larger processor.  I presume that the OP would use a better one under
looser time constraints.

Regards,

- --Brendan
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2002\08\15@140821 by Brendan Moran

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> I am using PIC18F258, there are about 1.5KB RAM and it ranges from
> bank0 to bank5. However I have used up to 1KB RAM for global
> variables, these variables cannot be stored in a single bank, such
> as bank1 or bank2. Thus I have distributed these variables almost
> around the whole RAM space. PLease give me some suggestions how to
> store these variables! Thanks in advance!
>
> Luke

Hmm... I thought someone had told me that 18F parts didn't require
banking. *coughs* Uh... Nevermind...  Use a macro or something.

But then, some instructions ignore the banking...

- --Brendan

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2002\08\15@142333 by Olin Lathrop

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> Hmm... I thought someone had told me that 18F parts didn't require
> banking. *coughs* Uh... Nevermind...  Use a macro or something.

PIC18 parts don't do paging (the full address is included in every GOTO and
CALL instruction), and don't do indirect banking (FSR registers contain the
complete address), but have not eliminated direct banking.  However, a bank
is 256 instead of 128 bytes in size, and there is also a choice between the
current bank and the "access" bank that is coded into each instruction.  The
access bank therefore becomes memory that is always directly available,
somewhat like the last 16 bytes of each bank on PICs like the 16F877.


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Embed Inc, embedded system specialists in Littleton Massachusetts
(978) 742-9014, http://www.embedinc.com

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2002\08\15@143149 by Mike Singer

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Brendan Moran wrote:
>
> Hmm... I thought someone had told me that 18F parts didn't require
> banking. *coughs* Uh... Nevermind...  Use a macro or something.
>
> But then, some instructions ignore the banking...
>

Maybe it was I. Sorry, I didn't red 18XXXX manual.
Just a kind of bluff presuming if 18XXXX are new
then they should be cool.

Sorry again. Mike.

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2002\08\15@145429 by Wouter van Ooijen

face picon face
> Hmm... I thought someone had told me that 18F parts didn't require
> banking. *coughs* Uh... Nevermind...  Use a macro or something.

The 18f's have roughly the same banking structure as other PICs, just
bigger. There is 160 bytes of special function registers (that is all
SFR's, unless you want to use CAN), plus 96 bytes of general-purpose
RAM, both always available (think of it as appearing in all banks, even
though uChip uses a different description). Besides this there is a 256
byte bank that can point at 256 byte boundaries in the total address
space. So without worrying about banking (just set up the bank bits
once) you have all FSRs (except CAN) plus 353 bytes RAM available (that
is almost as much as the total available on an f877). But the 18f's have
a total of 768 or 1536 bytes RAM, so sooner or later you will have to
start banking....

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