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'[PIC]: Working dual-clock speeds'
2000\11\19@051412 by staff

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Hi everyone. I got bored today (Sunday afternoon) and
decided to have a crack at the question posed on the piclist
a few weeks back, how to get two separate clock speeds on
a PIC allowing the PIC to decide which clock speed it is
using under software control. This provides an alternative
to sleep mode with wakeups.

I got it working fine! Only needs ONE schottky diode and ONE
PIC output pin to switch speeds (or can be switched by any
logic level signal).

Although the circuit is very simple I decided to put it up
as a .htm page as it has a few circuit diagrams and a lot
of text to describe how it works and factors affecting its
performance.

0.5 hours; design circuit on paper
1.5 hours; build/test a working model on protoboard
2.0 hours; write simple report with pictures

Who do I bill the 4 hours to?? Only kidding! ;o)

I don't know how long I will have this page up for, so if
you are interested in this dual clocking thing please save
the page and pictures to your hard drive. Maybe James would
like to add it to the piclist archives? (I would be
honoured!)

Here it is:
http://www.ezy.net.au/~fastvid/pic2clk.htm

I have some projects coming up soon and may not be able to
continue my piclist subscription. I have gained much from
the good people on this list and maybe this is something
I can offer back. :o)
-Roman

PS. If someone has already done this implementation I will
look pretty foolish, but nobody mentioned they had a simple
dual clock solution, and what the hey, I was bored on Sunday
afternoon. :o)

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2000\11\19@063435 by Morgan Olsson

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Well... I hate it if I trash your four hours work, but... couldn´t this be solved much easier:

1) Use the normal PIC RC osc configuration, calculate the values for low frequency.

2) Then add a resistor between OSC1 and an I/O pin.

For low frequency operation tristate that pin and it will operate on the low frequency.
For high frequency set that pin high and output, and it will be electrically parallelled to the other resistor.

(NEVER set that pin low and puput, as that will stop the osc immediately)

This solution will have no glitces. (clock pulses shorter than alowed)

Glitches on the other hand is the common problem when trying to switch crystal controlled frequency without using lot of external cirquitry.

Regards
/Morgan

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2000\11\19@162059 by Robert Rolf

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Exactly what I was going to suggest. This also has the advantage of
large R (therefor lower current) when running in low frequency mode.

By adding a series diode (it needn't be Schottky since it's DC biased)
to the output pin you don't need to worry
about driving active low (should you want to use the pin for another
function like a "high speed" LED indication).
Also, put the diode next to the Osc1 pin next to the extra R then
run your trace to the I/O pin. That way you minimize your capacitive
loading of the R/C node, and don't create a long antenna to radiate
the clock signal. I wouldn't hurt to have a small value bypass
cap at the I/O side of the R to reduce your RF emissions.

Roman's circuit does not need to use Schottky diodes since they are
always DC biased (if VCC=5V). Also, Schottky diodes have much higher
leakage currents at high temperatures, compared to traditional 1N4148s
and so your HF clock will vary with temperature.

If you need large clock ratios (I.E. Cfast is << Cslow) you might
also hang your LF cap off OSC1, and use a Trisstate output to ground
it. Your Cfast will be affected by your trace length & pin C but
this also gives you a single pin, 1 part, instant switching clock.

For crystal controlled switching the below cct MAY work (untested).
The theory is that the output side of the clock osc is a low impedance,
and so provides a DC return path for the switching diodes. OSC2 can also
drive other PIC oscillators so it obviously has some output capability.
Crystals bascally look like capacitors when far off resonance.
So you use a large value capacitor to AC couple the common side
of two crystals to the OSC1 input, and a pair of diodes to individually
couple the two crystals to the OSC2 pin (series). You drive each of the
diodes with a 100K (or so) biasing resistor to turn one one and one
off, depending on your I/O pin voltage. You put your usual gain
control capacitors (C1, C2) on the xtal pins to Gnd.

OSC1              OSC2
|                 |  |
C (.1)         D1 V  ^ D2
+__|xtal1|__RS____+__|__R1___
|__|xtal2|___________+__R2___+-- I/O

D1 points down, D2 points up.
If I/O is high, D1 is reverse biased, D2 is forward biased
and the OSC2 pin drives it low, pulled high by R2.
If I/O is low, D1 is forward biased, D2 is reverse biased
and the OSC2 pin drives it high, pulled low by R1.
R1 & R2 need to be chosen based on the frequency of the crystals.
E.G. Enough pullup/down for the frequency of use. One can also add
the series resistor needed for LP AT strip cut crystals as mentioned in
the osc section of the manual.

I remember building this cct a decade ago using HCMOS for the active
element. I don't know if it will work with the PIC osc cct, but it
should. The problem is that it takes time for the crystals to build
up amplitude, and so the intial clock cycles are of erratic nature.

Robert

Morgan Olsson wrote:
{Quote hidden}

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2000\11\21@203352 by Dan Michaels

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Roman Black wrote:
>Hi everyone. I got bored today (Sunday afternoon) and
>decided to have a crack at the question posed on the piclist
>a few weeks back, how to get two separate clock speeds on
>a PIC allowing the PIC to decide which clock speed it is
>using under software control. This provides an alternative
>to sleep mode with wakeups.
>
>I got it working fine! Only needs ONE schottky diode and ONE
>PIC output pin to switch speeds (or can be switched by any
>logic level signal).
...........
>Here it is:
>http://www.ezy.net.au/~fastvid/pic2clk.htm
>


Hi Roman,

Can you see a similar "easy" way to something like this with
2 different "oscillator" signals [ie, PIC_pin+diode -vs- bulky
external switching logic]?

I want to use one of the programmable oscillator chips - namely
the ECS-300, which has divide ratios from 1/2 down to 1/256 - but
unfortunately the non-divided output comes off a different pin
from the divided output, so you still need a way to select
between the two signals. All in all, with this part, you can get
20Mhz, 10, 5, 2.5, ............, or 16Mhz, 8, 4, 2, 1, .5, .25,
........... - nice.

best regards,
- Dan Michaels
Oricom Technologies
http://www.oricomtech.com
=========================

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2000\11\22@073738 by mike

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On Tue, 21 Nov 2000 20:33:52 -0500, you wrote:

{Quote hidden}

but why would you want to? If you're using an external clock chip, the
power drawn by this would probably outweigh any benefit from running
the PIC slowly.
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2000\11\22@081406 by Alok Dubey

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use counters to step down the clock?.. cascaded ones mebbe?

-----Original Message-----
From: Mike Harrison
To: PICLISTspamKILLspamMITVMA.MIT.EDU
Sent: 11/22/00 5:12 PM
Subject: Re: [PIC]: Working dual-clock speeds

On Tue, 21 Nov 2000 20:33:52 -0500, you wrote:

{Quote hidden}

but why would you want to? If you're using an external clock chip, the
power drawn by this would probably outweigh any benefit from running
the PIC slowly.

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2000\11\22@085400 by staff

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part 1 1513 bytes content-type:text/plain; charset=us-ascii (decoded 7bit)

Dan Michaels wrote:
{Quote hidden}

Hi Dan, yeah, here is a circuit that will do what you ask,
it needs two PIC pins driven differentially.
I am not too proud of this circuit, although it might
be cheaper and smaller board footprint than using logic
gates for switching it is not very pretty. I think it should
be functional though, even with 1N4148s.
:o)
-Roman


part 2 26305 bytes content-type:image/jpeg; name="Pic2clk7.jpg" (decode)


part 3 105 bytes
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2000\11\22@122314 by Dan Michaels

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Mike Harrison wrote:
.........
>>Can you see a similar "easy" way to something like this with
>>2 different "oscillator" signals [ie, PIC_pin+diode -vs- bulky
>>external switching logic]?
>>
>>I want to use one of the programmable oscillator chips - namely
>>the ECS-300, which has divide ratios from 1/2 down to 1/256 - but
>>unfortunately the non-divided output comes off a different pin
>>from the divided output, so you still need a way to select
>>between the two signals. All in all, with this part, you can get
>>20Mhz, 10, 5, 2.5, ............, or 16Mhz, 8, 4, 2, 1, .5, .25,
>>........... - nice.
>but why would you want to? If you're using an external clock chip, the
>power drawn by this would probably outweigh any benefit from running
>the PIC slowly.
>

Hi Mike,

Ya missed the point - this is not to do a low power lashup like Roman,
but to find an easy way to select between 2 different external clocks,
without having to use a lot of extra logic.

- danM

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2000\11\22@122521 by Dan Michaels

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Alok Dubey wrote:
> use counters to step down the clock?.. cascaded ones mebbe?
>

The oscillator chip already has the countdown built-in,
but the non-divided and divided signals come out 2 different
pins. The challenge is to find an easy way to select between
these 2 pins, without a lot of external logic - resistors +
diodes ok, extra chips [AND gates/etc] would be nice to stay
away from.

- danM
============



>{Original Message removed}

2000\11\22@123139 by Dan Michaels

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Roman Black wrote:
.....
{Quote hidden}

Hi Roman, a variation on the old AND-OR logic, I see.
Good start. The series Rs at 10K would probably be too big
for 20 Mhz operation - 2-3K might be alright.

Do you really need the pull-up diodes to the pins? Why not
just float vs pull low.

Now the stinker - can you do the switch using only 1 PIC pin?

best regards,
- dan michaels

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2000\11\22@140946 by rottosen

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How about this:

Typical crude ASCII art follows...

                        2.2K
Oscillator output #1 ---\/\/\/\-----------
                                _|_    _|_
                                \ /    \ /
          PIC output pin ________|      |______  PIC osc. input
                                _|_    _|_
                                \ /    \ /
                        2.2K     |      |
Oscillator output #2 ---\/\/\/\-----------


This uses a diode bridge for the switches. You should be able to find
this in several forms such as a balanced mixer or 2 dual diodes in
sot-23 packages, etc.

You may have to bias the oscillator input at one half of the supply
voltage or put a feedback resistor from the input to the output of the
PIC oscillator. I think about 10K ohms should work here.

-- Rich



Dan Michaels wrote:
{Quote hidden}

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2000\11\22@150331 by Olin Lathrop

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> Ya missed the point - this is not to do a low power lashup like Roman,
> but to find an easy way to select between 2 different external clocks,
> without having to use a lot of extra logic.

OK, but why would you want to use the low clock rate except to save power?


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, TakeThisOuTolinEraseMEspamspam_OUTembedinc.com, http://www.embedinc.com

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2000\11\22@162545 by mike

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On Wed, 22 Nov 2000 12:08:35 -0700, you wrote:

{Quote hidden}

This would be dangerous as the oscs would not be synchronised to the
PIC's clock before switching, so you run the risk of glitches  at
switch-over which could trip up the PIC. You could probably do some
tricks with sleep mode to reduce this risk. .

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2000\11\22@215006 by Dan Michaels

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Olin Lathrop wrote:
>> Ya missed the point - this is not to do a low power lashup like Roman,
>> but to find an easy way to select between 2 different external clocks,
>> without having to use a lot of extra logic.
>
>OK, but why would you want to use the low clock rate except to save power?
>

In this particular case, the idea was to have easy control over
"sampling rate" of some fast RAM - not to clock a microprocessor.
Seemed like a natural extension to what Roman was talking about.

Even with a fast Scenix, it is hard to get a 20Mhz controllable
clock output, but with the ECS chip [only 8-pin] you can get 20,
10, and 5 Mhz, and then use the uC for slower timing. Problem is,
with the ECS chip, 20Mhz [nondivided] comes out one pin and
10/5/... [divided] comes out another pin.

You can always use AND gates for switching, but I was hoping
for something simpler. Rich Ottosen may be onto it.

- dan michaels
==============

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2000\11\23@090322 by staff

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Dan Michaels wrote:
{Quote hidden}

Ha ha! I had a snap at it when I did that circuit, I think by
reversing some diodes I got close, but not close enough.
I imagine I can do it with one pin but maybe more parts.
Depends on priorities?? :o)

You are right about tri-stating the pins, but for my original
(and this) hardware solution I like to eliminate that, it might
be popular in the PIC world to constantly switch pins between
inputs and outputs to tri-state them but I don't like that.
A logic level output pin is just that! :o)
-Roman

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2000\11\23@102307 by Alok Dubey

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correct me if im wrong..

talk abt power consumption..
if im not mistaken. u plan to use the PIC o/p pin to bias the diodes in 1
bridge to ground out one of  the osc o/ps ?

then the PIC pins cannot be in float.. they ahve to be  high or low right?

agin.. as far as i can see u can shift b/w only 2 clocks.. which u could
have done using a gate and a divider
alok

{Original Message removed}

2000\11\23@103553 by staff

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Richard Ottosen wrote:
{Quote hidden}

I don't think it will work. If the PIC pin is low, and hence
disables the OSC1 source, there is no way the OSC2 can pull the
output high. I had a couple of one pin solutions like this, but
scrapped them when I realised it was going to be hard.

Is there a way to do a dual osc switch with only non-active
parts (no transistors or gates etc)?? Maybe a challenge??
:o)
-Roman

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2000\11\23@104009 by Alok Dubey

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i wouldnt work thatway from what i see.. Roman..
what u would get would be a function of both the clock frequencies..

whn o/p is high. then pic i/p is a fn of the 2 clocks.. kinda like a short
when osc1 is high and 2 is low..
else o/p would be osc 1
alok


{Original Message removed}

2000\11\23@104417 by Alok Dubey

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use a 2:1 mux , the PIC line as  a select line for the mux and the clock
source as the line i/ps to the mux..

osc1               ----------------
---------------|                        |
                  |                    |---------Pic o/p
osc2               |                    |
---------------|                        |
                  ----------------
                       |
                       | pic i/p select


this is the only soln u can go for if u want i select line
alok


{Original Message removed}

2000\11\23@104624 by Alok Dubey

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use a 2:1 mux , the PIC line as  a select line for the mux and the clock
source as the line i/ps to the mux..

osc1               ----------------
---------------|                        |
                  |    mux 2:1 |---------Pic o/p
osc2               |                    |
---------------|                        |
                  ----------------
                       |
                       | pic i/p select


this is the only soln u can go for if u want i select line
alok


{Original Message removed}

2000\11\23@105250 by staff

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Alok Dubey wrote:
>
> use a 2:1 mux , the PIC line as  a select line for the mux and the clock
> source as the line i/ps to the mux..
>
> osc1               ----------------
> ---------------|                        |
>                    |                    |---------Pic o/p
> osc2               |                    |
> ---------------|                        |
>                    ----------------
>                         |
>                         | pic i/p select
>
>  this is the only soln u can go for if u want i select line
> alok



Hi Alok, no I posted a working solution before for Dan, using
4 diodes and 3 resistors. No problem there, just that it used
2 PIC output pins to control it.
The challenge is to do it with ONE output pin??
-Roman

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2000\11\23@120053 by Dan Michaels

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Roman Black wrote:
>Alok Dubey wrote:
>>
>> use a 2:1 mux , the PIC line as  a select line for the mux and the clock
>> source as the line i/ps to the mux..
.......
>>  this is the only soln u can go for if u want i select line
>
>Hi Alok, no I posted a working solution before for Dan, using
>4 diodes and 3 resistors. No problem there, just that it used
>2 PIC output pins to control it.
>The challenge is to do it with ONE output pin??


Yes that "was" the challenge. However, there is a slight problem
with the original by Roman and also with Rich Otteson's sol'n.
Depends on how fast the clocks are.

Any time you use a diode OR or AND gate, you need a pulldown
[pullup] load resistor to keep the diodes in conduction after
the input signal changes direction. So this brings up several
issues:

1 - With Roman's ckt, Rload has to be small enough to pull down
   the pin in a timely fashion. At hi-freq, it has to be quite
   small --> eg, at 20 Mhz and assuming 10 pF capacitance at the
   pin Rload = 1/[2*pi*f*C] = 1/[2*pi*20Mhz*10pF] = 800 ohms.
   Not so bad, of course, at lower freq.

2 - Now, further implications are that Rload divides with Rout
   at the oscillators, so Rout must be << Rload.

3 - Also, since Rload is greater than Rout, risetimes and falltimes
   will be different, so the effective duty-cycle of the clock will
   not be 50%.

4 - Similarly, with RichO's ckt, I don't think it will work,
   since for the one oscillator you need a "pullup" resistor
   at the common output pin for correct operation, while you need
   a "pulldown" resistor at the same point for the other oscillator
   to work properly.

Unfortunately, these ckts may be "too" simple for good operation.
Probably need an real mux to do it. Roman's sol'n is close, but
you have the problem of how to match Rout vs Rload values, as
described above.

best regards,
- Dan Michaels
Oricom Technologies
http://www.oricomtech.com
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2000\11\23@120946 by rottosen

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Mike Harrison wrote:
{Quote hidden}

I was assuming that this would be used with the oscillator having two
outputs -- one divided down from the other. Even so, without looking at
the spec's for the relative timing of the two outputs there is no way of
knowing that the problem you mentioned won't exist.  :-(

I would not be surprised if there was a glitch on one edge or the other
when the switch is made since the PIC's internal delays from the
oscillator input to an output pin are not well defined.

Mike, thanks for keeping me honest.


-- Rich

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2000\11\24@035423 by staff

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Dan Michaels wrote:
{Quote hidden}

Hi Dan, yes you raised a good point re the resistor values.
I think I did enough testing on the other circuit to be able
to get this to work. I was running a 4MHz RC osc with a 22pf cap
and a 10k resistor, but this relies on the open-drain fet
in the PIC dragging the volts to ground.

Maybe 20MHz might be hard but I am sure I could get reliable
operation at 10MHz. Maybe it is possible to run the PIC in
RC mode, and use its fet to drag the signal down to gnd
once each input pulse? This sounds possible too.

The duty cycle doesn't matter! The PIC divides the thing by
4 anyway, and surely it only uses pos going or neg going edge
of the clock waveform anyway. The RC clock duty cycle is like
10:1 or worse.

1. Do you really need 20MHz top speed?
2. What output current will the divider chip sink/source?
:o)
-Roman

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2000\11\24@120059 by rottosen

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Dan:
Egad. You are absolutely right. The circuit cannot ever be biased
correctly. No way to make it work.

So that's 2 strikes against my poorly thought out idea. I ain't stickin'
around for the third strike.  :-0

Oh, well, I think it is time to use real gates and flip-flops to do it
right. Maybe consider the SOT-23 single gate packages to keep from
feeling that too much space is being used?


-- Rich



Dan Michaels wrote:
{Quote hidden}

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2000\11\24@144937 by Dan Michaels

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Rich Ottosen wrote:
>Dan:
>Egad. You are absolutely right. The circuit cannot ever be biased
>correctly. No way to make it work.
>
>So that's 2 strikes against my poorly thought out idea. I ain't stickin'
>around for the third strike.  :-0
>

Hey, the weather is nice in CO - good day to go out for a walk :).
===========

>Oh, well, I think it is time to use real gates and flip-flops to do it
>right. Maybe consider the SOT-23 single gate packages to keep from
>feeling that too much space is being used?
>

Can fudge a little at slower speeds, if you don't need 50% duty
cycle, as Roman indicated, but unfortunately looks like
gates/mux/something_extra needed at hi speeds.

best regards,
- dan michaels
==============

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2000\11\24@150429 by Dan Michaels

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Roman Black wrote:
..........
>1. Do you really need 20MHz top speed?
>2. What output current will the divider chip sink/source?
>:o)


I am looking at using the ECS dual-clock chip in a sampling
ckt where data is captured into relatively high-speed RAM,
so I need 20, 10, and 5 Mhz on the top end. 50 Mhz would be
nice. The controller [Scenix] can handle timing speeds below
5 Mhz. The RAM chips require close to 50% duty cycle on the
clock - they probably "could" handle a little asymmetry,
maybe 40-60 or 60-40.

I'll probably have to use an external mux - pppppppppp.

best regards,
- Dan Michaels
==============

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2000\11\25@034531 by Peter L. Peres

picon face
Here is something that works in the lab (for me):

             +--X1--+--R1---+
             |      |       |
             |      C1      |
             |      |       |
             |     gnd      |
             |              |
uC OSC in <---+--X2--+--___--+---< uC OSC out
             |      |   | SW
             C2     C3  |
             |      |   +-------< Select Xtal: H: fast
            gnd    gnd

X1 is a a 32kHz watch crystal and X2 is 3.57MHz. SW is 1/4 CD4066 or a low
Vp FET without reverse diode. The PIC was set to XT osc for this.

The circuit operates due to the Q rule. The Q rule says that given an
oscillator with a fixed gain and two or more frequency-defining circuits,
the frequency of the oscillator will be determined by the frequency
defining element with a higher Q. R1 is chosen as high as possible. The
switchover time is about half as long as it takes the 32kHz crystal to
start up or to stop, and during that time there may be no clock at all at
least when switching from 3.57 to 32kHz. Some experiments indicate that a
resistor across X1 is necessary to lower the Q of the watch crystal. 2M2
worked for me I think. Now, why would one want to try this knowing that
the PIC's oscillator programmed for XT will draw significant current even
when run at 32kHz ?

Peter

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2000\11\25@043427 by staff

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face
Dan Michaels wrote:
{Quote hidden}

Hmmmm. Now I'm really thinking logic gates. Stuff the
challenge, bring a 7400 chip to the party. :o)
-Roman

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2000\11\25@121742 by Bob Blick

face
flavicon
face
At 12:05 PM 11/24/2000 +0200, you wrote:
>Here is something that works in the lab (for me):

Way to go, Peter!

Cheerful regards,

Bob

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2000\11\25@124524 by Alok Dubey

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one more to the lot?
alok


-----Original Message-----
From: Peter L. Peres [RemoveMEplpspam_OUTspamKILLspamACTCOM.CO.IL]
Sent: Friday, November 24, 2000 3:35 PM
To: RemoveMEPICLISTTakeThisOuTspamspamMITVMA.MIT.EDU
Subject: Re: [PIC]: Working dual-clock speeds


Here is something that works in the lab (for me):

             +--X1--+--R1---+
             |      |       |
             |      C1      |
             |      |       |
             |     gnd      |
             |              |
uC OSC in <---+--X2--+--___--+---< uC OSC out
             |      |   | SW
             C2     C3  |
             |      |   +-------< Select Xtal: H: fast
            gnd    gnd

X1 is a a 32kHz watch crystal and X2 is 3.57MHz. SW is 1/4 CD4066 or a low
Vp FET without reverse diode. The PIC was set to XT osc for this.

The circuit operates due to the Q rule. The Q rule says that given an
oscillator with a fixed gain and two or more frequency-defining circuits,
the frequency of the oscillator will be determined by the frequency
defining element with a higher Q. R1 is chosen as high as possible. The
switchover time is about half as long as it takes the 32kHz crystal to
start up or to stop, and during that time there may be no clock at all at
least when switching from 3.57 to 32kHz. Some experiments indicate that a
resistor across X1 is necessary to lower the Q of the watch crystal. 2M2
worked for me I think. Now, why would one want to try this knowing that
the PIC's oscillator programmed for XT will draw significant current even
when run at 32kHz ?

Peter

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2000\11\27@032146 by Simon Nield

flavicon
face
see the circuit below.
someone else probably already suggested the exact same thing.
i haven't drawn on any load capacitors.
you'll get glitches as you switch.
i wonder what happens on power up when the control pin is tri-stated?
it probably won't work.

pretty ascii circuit though don't you think ?

Regards,
Simon


____________
           |
  in(osc1) |------------------------------.
           |                              |
           |                      |[]|    |
 out(osc2) |------+----[ 1k ]--+--|[]|----+
           |      |            |  |[]|    |
           |      |            |          |
           |      |           _|_         |
           |      |           \ /         |
           |      |           _V_         |
           |      |            |          |
  control  |-------------------+          |
           |      |           _|_         |
           |      |           \ /         |
           |      |           _V_         |
           |      |            |          |
           |      |            |          |
           |      |            |  |[]|    |
____________|      '----[ 1k ]--+--|[]|----'
                                  |[]|

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2000\11\27@032959 by Alok Dubey

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went over my head.. ascii is the right word
alok


{Quote hidden}

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2000\11\27@035326 by staff

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face
Nice circuit, and nicely drawn. Would there
be issues with the 1k resistors and the
capacitance of the diodes when the thing is
running at high clock speeds?

There will also be 2-3mA drawn through one
resistor and diode in either mode, (assuming
5v supply and 50% duty at OSC2) so I
am not sure how useful it would be for "low
power" speeds. :o)
-Roman





Simon Nield wrote:
{Quote hidden}

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2000\11\27@115107 by Dan Larson

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On Wed, 22 Nov 2000 21:50:06 -0500, Dan Michaels wrote:

>
>Even with a fast Scenix, it is hard to get a 20Mhz controllable
>clock output, but with the ECS chip [only 8-pin] you can get 20,
>10, and 5 Mhz, and then use the uC for slower timing. Problem is,
>with the ECS chip, 20Mhz [nondivided] comes out one pin and
>10/5/... [divided] comes out another pin.

Do the ECS-300 chips go up to 40Mhz? If so, why not just use one with
double your top speed and always use the divided output ? ...

Dan

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2000\11\27@163746 by Dan Michaels

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At 10:53 AM 11/27/00 -0600, you wrote:
>On Wed, 22 Nov 2000 21:50:06 -0500, Dan Michaels wrote:
>
>>
>>Even with a fast Scenix, it is hard to get a 20Mhz controllable
>>clock output, but with the ECS chip [only 8-pin] you can get 20,
>>10, and 5 Mhz, and then use the uC for slower timing. Problem is,
>>with the ECS chip, 20Mhz [nondivided] comes out one pin and
>>10/5/... [divided] comes out another pin.
>
>Do the ECS-300 chips go up to 40Mhz? If so, why not just use one with
>double your top speed and always use the divided output ? ...
>


You expect things to be so easy?  No, they only go to 20 mhz.
It would seem easy, and logical too, to have a single buffered
output with both divided and base frequencies, but no.

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2000\11\28@023603 by staff

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Dan Michaels wrote:
>
> At 10:53 AM 11/27/00 -0600, you wrote:
> >On Wed, 22 Nov 2000 21:50:06 -0500, Dan Michaels wrote:
> >
> >>
> >>Even with a fast Scenix, it is hard to get a 20Mhz controllable
> >>clock output, but with the ECS chip [only 8-pin] you can get 20,
> >>10, and 5 Mhz, and then use the uC for slower timing. Problem is,
> >>with the ECS chip, 20Mhz [nondivided] comes out one pin and
> >>10/5/... [divided] comes out another pin.
> >
> >Do the ECS-300 chips go up to 40Mhz? If so, why not just use one with
> >double your top speed and always use the divided output ? ...
> >
>
> You expect things to be so easy?  No, they only go to 20 mhz.
> It would seem easy, and logical too, to have a single buffered
> output with both divided and base frequencies, but no.
>

Aren't there a number of 4000 series cmos prescaler/divider
chips?? These will work at 20-50MHz fine and maybe you can find one
with single output and four control lines (/2 - /32)
Just a thought, rather than try to use the divider chip you
already have just get another. :o)
-Roman

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