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'[PIC]: Weird 16F877 USART behaviour'
2002\05\02@182324 by Joan Ilari

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Hi, Piclisters !

1- Introduction :

I am developing a project where a 16F877 has to communicate
with an external processor through a serial line by means
of its USART. The TX and Rx routines are interrupt-driven.

2- The (checked) fact :

If in the interrupt routine I check TXIF flag before RCIF,
when a byte is received, I find that :
TXIF is set =>
TX routine is called instead of RX one =>
RCREG register is not read =>
RX interrupt is not reset =>
interrupt program is continuously called =>
watchdog fires, etc ... etc...

The problem is solved if RCIF is tested before TXIF.

I have lost two days (nights !) to discover this.
I have checked the literature on USART operation and I
have not found why TXIF flag is set with RCIF.

Has somebody some idea of why this happens ? Can this come from
a defective 16F877 ?

  Joan Ilari

  Barcelona (Spain)    Tel. +34 93 431 96 39
  spam_OUTjoanTakeThisOuTspamilari.org

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2002\05\02@195631 by Tony Nixon

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Joan Ilari wrote:

>
> The problem is solved if RCIF is tested before TXIF.
>
> I have lost two days (nights !) to discover this.
> I have checked the literature on USART operation and I
> have not found why TXIF flag is set with RCIF.
>
> Has somebody some idea of why this happens ? Can this come from
> a defective 16F877 ?

Possibly but unlikely.

I would disable everything including the WDT and test only the interrupt
driven RX/TX code. Even as far as testing only the RX code, then
enabling the TX code.

If you can't easily seperate the functions, write a small test program
that does the same thing.

Some weird things can happen with external events, interrupts, and WDT
running together.

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Tony

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2002\05\02@204807 by Matt Pobursky

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On Thu, 2 May 2002 23:37:28 +0200, Joan Ilari wrote:
>Hi, Piclisters !
>
>1- Introduction :
>
>I am developing a project where a 16F877 has to communicate with
>an external processor through a serial line by means of its
>USART. The TX and Rx routines are interrupt-driven.
>
>2- The (checked) fact :
>
>If in the interrupt routine I check TXIF flag before RCIF, when
>a byte is received, I find that : TXIF is set => TX routine is
>called instead of RX one => RCREG register is not read => RX
>interrupt is not reset => interrupt program is continuously
>called => watchdog fires, etc ... etc...
>

The TXIF flag is a transmitter empty flag. It's set any time the
transmitter register is empty, so it will be set most of the
time. You need to disable TX interrupts until you load the first
character to be sent into the TXREG. Once you write the TXREG,
the TXIF flag will be cleared automatically. Then enable your TX
interrupt, when the character is sent the TXIF flag will be set
again and your TX interrupt will occur. After your last character
to be sent is loaded into the TXREG, disable TX interrupts so you
won't be interrupted after the last character is sent.

This one bites a lot of people.

Matt Pobursky
Maximum Performance Systems

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2002\05\03@042204 by Vitaliy

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> The TXIF flag is a transmitter empty flag. It's set any time the
> transmitter register is empty, so it will be set most of the
> time. You need to disable TX interrupts until you load the first
> character to be sent into the TXREG. Once you write the TXREG,
> the TXIF flag will be cleared automatically. Then enable your TX
> interrupt, when the character is sent the TXIF flag will be set
> again and your TX interrupt will occur. After your last character
> to be sent is loaded into the TXREG, disable TX interrupts so you
> won't be interrupted after the last character is sent.


This alone will only work if TX is the only interrupt used. If you are using any other interrupts (i.e. RX), besides disabling TX
interrupt after the last character is loaded into TXREG, you ALSO need to check TXIF flag LAST. Even if you disable TX interrupt
after you load your last character into the TXREG, the TXIF flag will be set when the character gets sent. So when, for example, you
get an RX interrupt, but check for TX interrupt first, TX routine will be called, since TXIF flag is always set when RXREG is empty.

Vitaliy

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2002\05\03@074325 by Olin Lathrop

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> If in the interrupt routine I check TXIF flag before RCIF,
> when a byte is received, I find that :
> TXIF is set =>
> TX routine is called instead of RX one =>
> RCREG register is not read =>
> RX interrupt is not reset =>
> interrupt program is continuously called =>
> watchdog fires, etc ... etc...
>
> The problem is solved if RCIF is tested before TXIF.
>
> I have lost two days (nights !) to discover this.
> I have checked the literature on USART operation and I
> have not found why TXIF flag is set with RCIF.
>
> Has somebody some idea of why this happens ? Can this come from
> a defective 16F877 ?

I have used an interrupt driven UART on a 16F87x a bunch of times without
noticing any problems.  I've always either used interrupts only for
receiving or tested the RCIF bit first if using both.  I guess I was more
worried about an input overrun that losing a little output bandwidth.  That
means I wouldn't have run into the problem as you state it.

However, I don't believe your conclusion.  I bet there is something else
wrong in your interrupt handler or other UART code to make it appear that
the TXIF / RCIF order matters.


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(978) 742-9014, http://www.embedinc.com

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2002\05\03@134736 by Joan Ilari

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Vitaliy :

You are completely right !

Thanks !

Joan

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2002\05\03@134741 by Joan Ilari

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Matt,

You are right, I must disable TX interrupts (I did) AND check TXIF flag
last because it will be almost always set.

Joan

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2002\05\03@134746 by Dwayne Reid

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At 12:23 AM 5/3/02 -0700, Vitaliy wrote:
> > The TXIF flag is a transmitter empty flag. It's set any time the
> > transmitter register is empty, so it will be set most of the
> > time. You need to disable TX interrupts until you load the first
> > character to be sent into the TXREG. Once you write the TXREG,
> > the TXIF flag will be cleared automatically. Then enable your TX
> > interrupt, when the character is sent the TXIF flag will be set
> > again and your TX interrupt will occur. After your last character
> > to be sent is loaded into the TXREG, disable TX interrupts so you
> > won't be interrupted after the last character is sent.
>
>
>This alone will only work if TX is the only interrupt used. If you are
>using any other interrupts (i.e. RX), besides disabling TX
>interrupt after the last character is loaded into TXREG, you ALSO need to
>check TXIF flag LAST.

Actually, the appropriate thing to do is check the TXIE flag as well as
TXIF.  My ISR tests both flags: if either TXIE or TXIF are clear, the TX
ISR is skipped.

Depending upon how you do it, this adds either 1 or 2 lines of code to the
ISR parsing routine, taking 1 or 2 extra instruction cycles.  And it avoids
all the problems mentioned.

dwayne





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2002\05\04@021118 by Michael Rigby-Jones

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{Quote hidden}

This is only true if you aren't handling interrupts properly.  If you
disable and enable interrupts within your mainline code then within your
interrupt handler you must check the relevant interrupt enable flag as well
as the peripheral inerrupt flag. In 'C' you'd do this:

if(TXIF && TXIE)
       {
       // handle transmit interrupt
       }

And in assembly, something like this, (assumes context save already
executed)

       movf    PIR1,w          ; get interrupt flags
       banksel PIE1
       andwf   PIE1,w          ; AND with interrupt enable flags
       banksel temp
       movwf   temp            ; move valid interrupt sources into
temporary variable
       btfsc   temp,TXIE       ; check for TX interrupt
       goto    TXIntHandler
       btfsc   temp,RXIE       ; check for RX interrupt
       goto    RXIntHandler

       etc...etc...

Regards

Mike

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2002\05\04@080226 by Joan Ilari

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Dwayne,

You are right : if TXIE is set AND TXIF is set => send byte (as far as
TXIE has been enabled AFTER loading TXREG)

Cheers

Joan

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