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'[PIC]: SIMM memory'
2000\10\12@120441 by Miguel Angel Heredia Moreno

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It is easy to use those SIMM (30-pin) memory banks from the old PC with the
PIC ?

Do you have any link to this kind of use ?

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2000\10\12@120842 by Alok Dubey (OCS-BLRRO-AVS)

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yes u need to fig out the addr bus pins and the dat bus pins.. i dont know
abt the clocking.. but surely itll wrk.. u might need voltage translators
too
alok


> {Original Message removed}

2000\10\12@123134 by -1252?Q?Ole_Petter_R=F8nningen?=

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Buy a vowel..
----- Original Message -----
From: "Alok Dubey (OCS-BLRRO-AVS)" <.....adubeyKILLspamspam@spam@WIPRO.CO.IN>
To: <PICLISTspamKILLspamMITVMA.MIT.EDU>
Sent: Thursday, October 12, 2000 6:04 PM
Subject: Re: [PIC]: SIMM memory


> yes u need to fig out the addr bus pins and the dat bus pins.. i dont know
> abt the clocking.. but surely itll wrk.. u might need voltage translators
> too
> alok
>
>
> > {Original Message removed}

2000\10\12@124904 by Bob Ammerman

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They'll be 5V.

You can probably get the timing OK.

The address is multiplexed. (good - fewer pins needed to drive it)

But they are DRAM - you'll have to continually refresh them.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

----- Original Message -----
From: Alok Dubey (OCS-BLRRO-AVS) <.....adubeyKILLspamspam.....WIPRO.CO.IN>
To: <EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU>
Sent: Thursday, October 12, 2000 12:04 PM
Subject: Re: [PIC]: SIMM memory


> yes u need to fig out the addr bus pins and the dat bus pins.. i dont know
> abt the clocking.. but surely itll wrk.. u might need voltage translators
> too
> alok
>
>
> > {Original Message removed}

2000\10\12@133438 by ?us-ascii?Q?Roland_Kohler?=

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It's quite easy; I did the same thing with an 8051 a while ago.
Maybe PIC's are not ideally suited for this, because the address/data bus is
not available at pins, so you have to use more instructions to set up the
address and then read/write data.

Get a data sheet of the SIMM pinning, connect the data IO's to a port; if
the SIMM and the PIC use the same supply (like 5V) there is no need for any
additional hardware (except 100n-caps for VCC-GND). Use one pin each for /WE
(write enable), /RAS (row address sel.), and /CAS (column addr.sel.);
depending on the SIMM there may be several /RAS, /CAS lines (a look at the
block diagram in the data sheet tells why).
The address of a byte (word) is built by latching the hi part (preset at the
address lines, then pull /RAS low), then latching the lo part (like hi, only
with /CAS); the minimum timing restrictions will be of no concern because
the PIC is much slower. The max. times and the overall sequence are also
shown in the data sheet - if not, get a sheet of the DRAM's used on the
SIMM.
At the /CAS edge data is written if /WE is low; when reading (/WE hi) data
will be present after the /CAS edge.
The only trick is that you must "refresh" the memory to retain data. This is
done every time a /RAS address is accessed - but to keep all other locations
it is necessary to use one of the refresh methods described in the
datasheet.
One method is /CAS-before-/RAS refresh, which pulling /CAS, then /RAS lo a
specified number of times (maybe 128, 256, 512 ..) in the "refresh interval"
(maybe 2ms ...). So the PIC must spend a certain amount of time just
refreshing the DRAM. In this refresh mode the DRAM's use an internal address
counter to cycle through all possible hi addresses.

Sorry I only got the datasheets in books, not as .pdf.

Have fun.

Roland Koehler.

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