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'[PIC]: Random number generator?'
2000\11\30@151950 by Drew Vassallo

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I'm starting a project using the 16F84 that will require a random number
between 1 and 4 to be generated each cycle through the main program.  Anyone
have any quick solution to this?  I was thinking about starting with the
TMR0 register on startup because the bits are unknown on powerup reset.
Exactly what to do with it after that, I'm not sure.

Thanks.

--Drew
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2000\11\30@155235 by Bob Ammerman

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If you have any interaction with the outside world (especially humans) then
timing events there (like keypresses) works well.


Or, you can use a pseudo-random number generator. (see Knuth, for example).

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\11\30@205646 by Antonio L Benci

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part 1 1047 bytes content-type:text/plain; charset=us-ascii (decoded 7bit)

Try the attached code...

Its code for 32bit pseudo-random noise generator. You can tap a number
from any of the registers...

Drew Vassallo wrote:
{Quote hidden}

Nino.
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------------------------------------------------------
| Antonio (Nino) L. Benci                            |
| Professional Officer / Electronic Services Manager |
| Department of Physics                              |
| Monash University                                  |
| T: 61 3 9905 3649. F: 61 3 9905 3637               |
| M: 0414 924 833                                    |
------------------------------------------------------


part 2 6647 bytes content-type:text/plain; charset=us-ascii; name=noise84.asm
(decoded 7bit)

;
;   Pseudorandom digital white noise generator for PIC series.
;
;   PIC12C508 version written April 7th, 1997 by Scott Rider.
;   Questions/comment to spam_OUTchipTakeThisOuTspamaeug.org
;
;   PIC16C84 modified version by Antonio L. Benci. 15/07/1999.
;
;   This program uses Microchip assembler mnemonics and the Microchip
;   MPASM assembler (http://www.microchip.com/).
;
;
;     Pin connections for the the 16C84/F84
;                  _______  _______
;                 |       \/       |
;      DI1, RA2 --+ 1           18 +-- RA1 Data, DI0
;                 |                |                      470
;      DI2, RA3 --+ 2           17 +-- RA0 (audio out) --/\/\/-- (spkr)
;                 |                |                  |   10K   1uF
;      DI3, RA4 --+ 3           16 +-- OSC1            --/\/\/--|(-- (line)
;                 |                |
;         !MCLR --+ 4           15 +-- OSC2
;                 |                |
;           VSS --+ 5           14 +-- VDD
;                 |                |
;      AD0, RB0 --+ 6           13 +-- RB7, AD7
;                 |                |
;      AD1, RB1 --+ 7           12 +-- RB6, AD6
;                 |                |
;      AD2, RB2 --+ 8           11 +-- RB5, AD5
;                 |                |
;      AD3, RB3 --+ 9           10 +-- RB4, AD4
;                 |  (PIC16C/F84)  |
;                 +----------------+
;
;   This program generates a continuous stream of white noise through a
; speaker connected (via a 470-ohm series resistor) to pin RA0 of a
; PIC16F84.  It demonstrates an easy method for generating a seemingly
; random stream of bits. Hardware folks will probably recognize it as the
; tapped shift register technique covered in the CMOS Cookbook by Don
; Lancaster.
;
; A 12 bit DAC is connected to RB0..RB7 and RA1..RA4 (DI0..DI3). DI0 to DI3
; provide amplitude scaling and AD0 to AD7 provides envelope modulation.
; RA0 is a 400ns pulse output which is pulse height modulated by the code
; presented on RB0..RB7 + the amplitude weighting code applied to RA1..RA4
; (DI0..DI3). Refer to noise84.sch for further details.
;
; Adapted from the original PIC16C54 (Parallax) version by Scott Edwards.
;
;##########################################################################
;
; Programmable noise weighting added by A L Benci 22/03/1999
;
; RA1..RA4 are connected to a dip switch which the user can use to select
; 'textures' of 2 to 30. A zero value skips the function.
;
;
       list    p=16f84
       radix   dec
       include "p16f84.inc"

       __FUSES _WDT_OFF & _CP_OFF & _CP_OFF & _HS_OSC  ;External osc.

       cblock  0x0C    ;Variables
               i           ;Loop counter
               u                       ;scratch, bit 1
               v                       ;scratch, bit 5
               x           ;Scratch, bit 6
               y           ;Scratch, bit 11
               zz              ;Scratch
;
; Taps for a 32 register are 1,5,6,31 for maximal length
;
               sr0         ;32 bits of shift register
               sr1
               sr2
               sr3         ;/
       endc

       org     0x000

pwrupr  goto    start

       org     0x004

intvec  goto    start

           org     0x005

;
;  This is the code body...
;
loop    decfsz  i,F
           goto    loop
           retlw   0

start   bsf     STATUS,RP0      ;page 01
       movlw   NOT_RBPU
           movwf   OPTION_REG      ;
       bcf     STATUS,RP0      ;page 00

           movlw   b'00000000'     ;Preset outputs to come up low
           movwf   PORTB           ;/
       bsf     PORTA,0         ;set RA0 output low

       bsf     STATUS,RP0      ;page 01
           movlw   b'00000000'     ;Set the I/O direction, all outputs
           movwf   TRISB           ;
       movlw   b'11111110'     ;set RA0 as output
       movwf   TRISA
       bcf     STATUS,RP0      ;page 01


               movlw   b'00000001'             ;Start with a seed of 1.
               movwf   sr0
           clrf    sr1
           clrf    sr2
           clrf    sr3             ;/
;
; The main loop 'taps' is 24 CPU cycles.  At the 10MHz clock rate,
; the noise output is operating at a rate of about 65KHz.
;
taps    btfss   sr3,7           ;Get bits 1, 5, 6 and 31 for the feedback XOR.
           bcf     x,0
       btfsc   sr3,7
       bsf     x,0             ;Bit 31 -> x

       btfss   sr0,6
       bcf     y,0
       btfsc   sr0,6
       bsf     y,0             ;Bit 6  -> y

               btfss   sr0,5
       bcf     v,0
       btfsc   sr0,5
       bsf     v,0             ;Bit 5  -> v

               btfss   sr0,1
       bcf     u,0
       btfsc   sr0,1
       bsf     u,0             ;Bit 1  -> u

       movf    x,W             ;!(x XOR y XOR v XOR u) -> carry
       xorwf   y,W                             ;xor bits 31 & 6, result in W reg
               movwf   zz                              ;temporarily save result
               movf    v,W
               xorwf   u,W                             ;xor bits 1 & 5, result in W reg
               xorwf   zz,F                    ;xor zz with W, save result in zz register

       btfsc   zz,0
       bcf     STATUS,C
       btfss   zz,0
       bsf     STATUS,C

       rlf     sr0,F          ;32-bit shift
       rlf     sr1,F
       rlf     sr2,F
       rlf     sr3,F          ;/

;
; Put a pseudorandom bit out to the speaker.  In this example all 8 PORTB
; bits are use for for noise noise envelope modulation. The pulse is taken
; from bit 31, if set PULSE of clear NO PULSE.
;
       movf    sr0,w           ;
       movwf   PORTB           ;set modulation envelope value
                               ;envelope value can be either sr0,1,2 or 3

       nop                     ;a 400nS delay for DAC stabilisation
                               ;this is ok if a DAC0800 is used

       btfsc   sr3,7           ;line 1
       bsf     PORTA,0         ;set hi
               bcf             PORTA,0                 ;set low

;
;  Uncomment the following 'call loop' to experiment with changing the
; 'texture' of the noise (see 'wait' routine, above).

       movf     PORTA,W                ;read switch input
       andlw    b'00011110'    ;mask all but swt bits
       movwf    i                      ;save value

;       btfss    STATUS,Z           ;is result zero
;       call     loop           ;Optional delay routine to alter sound
       goto     taps           ;Ad infinitum...
;
;  That's all, folks!
;
       end


part 3 520 bytes content-type:text/x-vcard; charset=us-ascii; name=Nino.Benci.vcf
(decoded 7bit)

begin:vcard
n:Benci;Antonio L
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tel;home:0414 924 833
tel;work:+61 3 9905 3649
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url:http://www.physics.monash.edu.au/~ninob
org:Monash University;Department of Physics
version:2.1
email;internet:.....Nino.BenciKILLspamspam@spam@sci.monash.edu.au
title:Professional Officer/Electronic Services Manager
adr;quoted-printable:;;PO Box 27=0D=0ADepartment of Physics=0D=0AMonash University;Monash University;VIC;3800;Australia
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part 4 131 bytes
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