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'[PIC]: PIC on FPGA?'
2001\05\02@132847 by Saurabh Sinha

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Hi,

Anyone tried something like trying to implement a PIC on an FPGA?

Thanks for your info.

Regards,

S. Sinha (Saurabh)
Tel/Fax: (012) 343-4912
Cell: 0825405577
E.Mail: spam_OUTssinhaTakeThisOuTspamIEEE.ORG
Visit: http://home.mweb.co.za/si/sinha
ICQ: 82010326

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2001\05\02@154214 by Andrew Warren

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Saurabh Sinha <.....PICLISTKILLspamspam@spam@mitvma.mit.edu> wrote:

> Anyone tried something like trying to implement a PIC on an FPGA?

   Of course.  See:

       http://www.opencores.org/cores/minirisc/

   -Andy


=== Andrew Warren --- aiwspamKILLspamcypress.com
=== IPD Systems Engineering, CYSD
=== Cypress Semiconductor Corporation
===
=== Opinions expressed above do not
=== necessarily represent those of
=== Cypress Semiconductor Corporation

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2001\05\02@220216 by Jay.R.Vijay-Indra

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At 19:20 02/05/01 -0700, you wrote:
>Hi,
>
>Anyone tried something like trying to implement a PIC on an FPGA?
>

Yes this has been done about 4 or 5 years back. Very nice chap called
Thomas.A.Coonan posted a file called SYNTHPIC.ZIP on his web site. This
file had  a VHDL core for PIC CPU and couple of other VHDL files for I/O
ports and some test files.

I implemented them with some modifications on Xilinx 4005 and manage to get
40Mhz clock speed. It was fun.

Check http://www.mindspring.com/~coonan, I am sure file is still there. If not I
will try and find it on my old hard disk.

Regards,

Jay



>
>
>
>

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2001\05\02@223718 by Bob Ammerman

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I looked closely at this a few months back.

It was an impressive piece of work.

I did find a couple of small bugs in the VHDL. I corresponded with Mr.
Coonan and he was going to fix them. I don't know if the updated code has
been posted.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2001\05\02@232251 by Bob Ammerman
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I went on a hunt...

Here is the corrected URL:

http://www.bomis.com/rings/Mhardware-open_source-computers/20

The bug fixes listed include the ones I found:

- Generalized PC write so that you can do fancy computed-goto types of
things

- Fixed STATUS register update. For example, Clearing STATUS actually now
causes Z to be set

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2001\05\03@023951 by David Cary

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Dear Andrew Warren,

Saurabh Sinha <.....PICLISTKILLspamspam.....mitvma.mit.edu> wrote:
> Anyone tried something like trying to implement a PIC on an FPGA?

Andrew Warren <EraseMEaiwspam_OUTspamTakeThisOuTCYPRESS.COM> on 2001-05-02 02:36:48 PM replied,
>    Of course.  See:
>        http://www.opencores.org/cores/minirisc/

Very cool. Thanks for the link. I hope you find these other links interesting
(even though they describe non-PIC processors).

The Design Your Own Processor Info Page.
http://www.spacetimepro.com/dyop.htm
(uses a Xilinx XC4000XL series FPGA)

http://www.fpgacpu.org/
Jan Gray has aparently managed to get 60 (!) of his small CPUs to fit on a
single Xilinx FPGA, and speculated about packing ever more CPUs on a single
chip.

List of FPGA-based Computing Machines
http://www.io.com/~guccione/HW_list.html

two FPGA-based CPU Designs by John Rible
http://www.sandpipers.com/

Xputer Lab Kaiserslautern - Reconfigurable Computing with KressArray
http://xputers.informatik.uni-kl.de/xputer/index_xputer.html

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David Cary

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2001\05\03@133753 by Saurabh Sinha

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Hi,

The site doesn't exist. Could you perhaps send the file to me? Thanks.

Regards,

S. Sinha (Saurabh)
Tel/Fax: (012) 343-4912
Cell: 0825405577
E.Mail: ssinhaspamspam_OUTIEEE.ORG
Visit: http://home.mweb.co.za/si/sinha
ICQ: 82010326

{Original Message removed}

2001\05\03@135421 by Jay.R.Vijay-Indra

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face
At 19:20 02/05/01 -0700, you wrote:
>Hi,
>
>Anyone tried something like trying to implement a PIC on an FPGA?
>

Yes this has been done about 4 or 5 years back. Very nice chap called
Thomas.A.Coonan posted a file called SYNTHPIC.ZIP on his web site. This
file had  a VHDL core for PIC CPU and couple of other VHDL files for I/O
ports and some test files.

I implemented them with some modifications on Xilinx 4005 and manage to get
40Mhz clock speed. It was fun.

Check http://www.mindspring.com/~coonan, I am sure file is still there. If not I
will try and find it on my old hard disk.

Regards,

Jay



>
>
>
>

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2001\05\03@140918 by jamesnewton

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Please see
http://www.piclist.com/techref/microchip/alternatives.htm

the site is
http://www.mindspring.com/~tcoonan/

As always, all answers are at piclist.com <GRIN>

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