Post by thread:[PIC]: Newbie Quota (was Odd Problem)

At 10:32 PM 2/24/2003 +1100, Ian McLean wrote: >Are you using only 1 x 22pF ceramic ? Sounds like it from your reply. You >should be using two - one leg of each capacitor to each of the two pins on >the XTAL, the other side of both caps tied together and to earth. > >If you have 1 cap tied between the two legs of the XTAL, this is probably >your problem ... I am hopeful that as a complete Newbie I might be allowed a certain quota of dumb questions before getting flamed, in the thought that I will get up to speed quickly. I read the questions and answers in this list and try to figure out what is going on. So....the question raised by "Odd Problem" prompts a question: I am in the process of getting my first test bed set up (for an 18F452) and need to order a 10 Mhz crystal. They seem to come in two flavors: serial, and 20pF. My understanding is that the 20pF is the preferred one. If that is true, is it still necessary to use the two caps to ground from the leads??? John -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email spam_OUTlistservTakeThisOuTmitvma.mit.edu with SET PICList DIGEST in the body

Read page 17 of the data sheet, and tell us *then* what's unclear. From your question, I don't think you have. (Hint: "parallel cut", and two caps with a value according to the tables on page 17...) Jan-Erik Soderholm John Nall wrote: >I am in the process of getting my first test bed set >up (for an 18F452) and need to order a 10 Mhz crystal. They seem to come >in two flavors: serial, and 20pF. My understanding is that the 20pF is >the preferred one. If that is true, is it still necessary to use the two >caps to ground from the leads??? -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email .....listservKILLspam@spam@mitvma.mit.edu with SET PICList DIGEST in the body

Just to clear things up a bit, when the crystal is rated at 20 pF, that doesn't mean that it has a 20 pF capacitance. The rating is the recommended value of the capacitors that you will connect to ground from the crystal.. BTW, you can also get 3-pin ceramic resonators that have the caps built-in. They're slightly less accurate, but it's not a problem unless you need very precise timing. Daniel Imfeld ---- Original Message ---- From: "Herbert Graf" <mailinglistspam_OUTFARCITE.NET> To: <@spam@PICLISTKILLspamMITVMA.MIT.EDU> Sent: Monday, February 24, 2003 12:15 PM Subject: Re: [PICLIST] [PIC]: Newbie Quota (was Odd Problem) {Quote hidden}> > up (for an 18F452) and need to order a 10 Mhz crystal. They seem > > to come > > in two flavors: serial, and 20pF. My understanding is that the > > 20pF is > > the preferred one. If that is true, is it still necessary to use > > the two > > caps to ground from the leads??? > > Yes, in fact using a serial resonance crystal is not advised > for the simple reason that it will not oscillate at the marked > frequency, it will be off a certain percentage. With the PIC you > always need the caps. TTYL -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email KILLspamlistservKILLspammitvma.mit.edu with SET PICList DIGEST in the body

Daniel Imfeld <RemoveMEdimfeldTakeThisOuTSOFTHOME.NET> wrote: > Just to clear things up a bit, when the crystal is rated at 20 pF, that > doesn't mean that it has a 20 pF capacitance. The rating is the > recommended value of the capacitors that you will connect to ground from > the crystal.. Note quite. It's actually the net capacitance that's expected to be in parallel with the crystal. This includes the series combination of your external capacitors, plus the distributed capacitance of the PCB traces and the chip pins. For example, if you use two 33 pF capacitors, this accounts for 16.5 pF of actual parallel capacitance across the crystal. This leaves about 3.5 pF for pin/trace capacitance, which is about right. -- Dave Tweed -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email spamBeGonelistservspamBeGonemitvma.mit.edu with SET PICList DIGEST in the body

> Note quite. It's actually the net capacitance that's expected to be in > parallel with the crystal. This includes the series combination of your > external capacitors, plus the distributed capacitance of the PCB traces > and the chip pins. Are you really sure, Dave? I thought (although can't find reference right now) that the capacitance rating was the load capacitance required on the output of the crystal to produce the proper phase shift at the rated frequency. I further thought that the capacitor on the input side of the crystal was only there to soften the edges and reduce the harmonics from the driver. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email TakeThisOuTlistservEraseMEspam_OUTmitvma.mit.edu with SET PICList DIGEST in the body

At 06:42 PM 2/24/2003 -0500, you wrote: > > Note quite. It's actually the net capacitance that's expected to be in > > parallel with the crystal. This includes the series combination of your > > external capacitors, plus the distributed capacitance of the PCB traces > > and the chip pins. > >Are you really sure, Dave? I thought (although can't find reference right >now) that the capacitance rating was the load capacitance required on the >output of the crystal to produce the proper phase shift at the rated >frequency. I further thought that the capacitor on the input side of the >crystal was only there to soften the edges and reduce the harmonics from >the driver. Yes, it IS correct, and I think we've been through this before. Best regards, Spehro Pefhany --"it's the network..." "The Journey is the reward" RemoveMEspeffTakeThisOuTinterlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listservEraseME.....mitvma.mit.edu with SET PICList DIGEST in the body

Can someone point me to a detailed explanation of this, though? I know we have been through this before, but I didn't find it very satisfying (especially now that I have looked into it a little further). When you put the xtal in this configuration, with capacitance to gnd at either end, it really is not running at either resonance (series or parallel), but has to look inductive in order to cause a 180 deg phase shift from a resistive source feeding the xtal/cap network to a resistive load on the other end. It looks more like a pi network than an xtal with an effective parallel capacitance, as far as I can tell. I did an analysis of this with the help of spice once and, IIRC, I found that depending on several factors (perhaps the load and driving resistances, and the difference between the capacitance on either side) you could cause a net 180 deg phase shift through the network over a range of frequencies (just like a variable xtal oscillator does), so that actually, if the frequency printed on the can is intended to be the exact operating point, they must have made some assumptions about the external circuit in addition to just specifying one (net) capacitance value. Sean At 06:51 PM 2/24/2003 -0500, you wrote: {Quote hidden}>At 06:42 PM 2/24/2003 -0500, you wrote: >> > Note quite. It's actually the net capacitance that's expected to be in >> > parallel with the crystal. This includes the series combination of your >> > external capacitors, plus the distributed capacitance of the PCB traces >> > and the chip pins. >> >>Are you really sure, Dave? I thought (although can't find reference right >>now) that the capacitance rating was the load capacitance required on the >>output of the crystal to produce the proper phase shift at the rated >>frequency. I further thought that the capacitor on the input side of the >>crystal was only there to soften the edges and reduce the harmonics from >>the driver. > >Yes, it IS correct, and I think we've been through this before. > >Best regards, > >Spehro Pefhany --"it's the network..." "The Journey is the reward" >EraseMEspeffinterlog.com Info for manufacturers: http://www.trexon.com >Embedded software/hardware/analog Info for designers: http://www.speff.com > >-- >http://www.piclist.com#nomail Going offline? Don't AutoReply us! >email RemoveMElistservEraseMEEraseMEmitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email RemoveMElistservspam_OUTKILLspammitvma.mit.edu with SET PICList DIGEST in the body

Sean H. Breheny <RemoveMEPICLISTTakeThisOuTspammitvma.mit.edu> wrote: > Can someone point me to a detailed explanation of [crystal > oscillator Load Capacitance specs?] Sean: You may want to take a look at Microchip's AN826, "Crystal Oscillator Basics and Crystal Selection for rfPIC and PICmicro Devices"; it's not TOO detailed, but it might contain the information you need. You can find it on Microchip's web site. -Andy === Andrew Warren -- EraseMEaiwspamspamBeGonecypress.com === Principal Design Engineer === Cypress Semiconductor Corporation === === Opinions expressed above do not === necessarily represent those of === Cypress Semiconductor Corporation -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email RemoveMElistservKILLspammitvma.mit.edu with SET PICList DIGEST in the body

Hi Russell and Andy, Thanks for the links. I've seen the old mchip xtal app note but I'll have to take a look at the new one (and these links in more detail) when I have some more time. Specifically, the question I have never seen addressed to my satisfaction is why it is justified to consider the two external caps to be "in series". Under that idea, it should not matter what I choose for C1 and C2 as long as their series combination is the same capacitance, I should get the same oscillation frequency (assuming stray cap and all else is the same). It seems to me that this is not true, and that even several values of C1,C2 which gave the same CL could result in different 180 deg phase points, hence different oscillation frequencies. The argument I've usually seen is to redraw the caps in series with a ground point in the middle and then say that, as far as the crystal is concerned, there is just one loop of current through all three components and they are effectively in series. This ignores that you are going to attach other things (the inverter input and output) to the ends of this, making it not nearly so symmetrical. Also, the first of the two links you sent, Russell, claims that the cap on the output of the inverter, along with the drive limit resistor, form a simple RC voltage divider, and you can compute the voltage level at this point based on this. I don't think this is an accurate way of describing it since it is also connected to the (inductive) xtal which may alter the impedance at that junction considerably. Sean At 02:35 PM 2/25/2003 +1300, you wrote: {Quote hidden}> > > Can someone point me to a detailed explanation of [crystal > > > oscillator Load Capacitance specs?] > >Closish > > http://www.eetkorea.com/ARTICLES/2001SEP/2001SEP06_AMD_AN.PDF > >Not quite what you want, but useful > > http://pdfserv.maxim-ic.com/arpdf/AppNotes/app58.pdf > >-- >http://www.piclist.com#nomail Going offline? Don't AutoReply us! >email spamBeGonelistservSTOPspamEraseMEmitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email KILLspamlistservspamBeGonemitvma.mit.edu with SET PICList DIGEST in the body

> Also, the first of the two links you sent, Russell, claims that the cap on > the output of the inverter, along with the drive limit resistor, form a > simple RC voltage divider, and you can compute the voltage level at this > point based on this. I don't think this is an accurate way of describing it > since it is also connected to the (inductive) xtal which may alter the > impedance at that junction considerably. Yep. It's all black magic. Alas, the spells vary depending on what book you look in. It is possible for the oscillator signal to get outside the rails slightly. Add a parallel inductor (as I have had to do on one design to compensate for a manufacturers inability to build microprocessors which meet specification)(not PIC) and the output can get substantially outside rail. I agree with the "add the two capacitors in series" idea, with ground being independent for small signal models. But, as you note, in the real world other factors enter the model. If you have a near rail to rail swing and the capacitors are substantially unequal and you ground their midpoint that will skew the signal wrt the supply rails and carry one extreme outside the supply rail. Get a diode drop too high or too low and interesting results will occur. Russell -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email EraseMElistservEraseMEmitvma.mit.edu with SET PICList DIGEST in the body

Hi Russell, I probably should wait until I have read the links in more detail but I can't resist engaging the mouth ;-) I don't see why this should have to be "black magic". Isn't it (to good approximation) a simple pi network with the xtal as the inductor? Yes, I suppose you would have to include the resistive part of the xtal impedance, too, but it shouldn't be that hard. I also don't see why you agree with the "series" idea. It has nothing to do with ground being independent, but rather that the xtal/caps combo is a three terminal device (gnd, input, output) so it does not look symmetrical if C1 is not equal to C2, so you can't just (AFAICT) say it's a two terminal device with a single effective cap across the xtal. Sean At 05:22 PM 2/25/2003 +1300, you wrote: {Quote hidden}> > Also, the first of the two links you sent, Russell, claims that the cap on > > the output of the inverter, along with the drive limit resistor, form a > > simple RC voltage divider, and you can compute the voltage level at this > > point based on this. I don't think this is an accurate way of describing >it > > since it is also connected to the (inductive) xtal which may alter the > > impedance at that junction considerably. > >Yep. It's all black magic. Alas, the spells vary depending on what book you >look in. It is possible for the oscillator signal to get outside the rails >slightly. Add a parallel inductor (as I have had to do on one design to >compensate for a manufacturers inability to build microprocessors which meet >specification)(not PIC) and the output can get substantially outside rail. > >I agree with the "add the two capacitors in series" idea, with ground being >independent for small signal models. But, as you note, in the real world >other factors enter the model. If you have a near rail to rail swing and the >capacitors are substantially unequal and you ground their midpoint that will >skew the signal wrt the supply rails and carry one extreme outside the >supply rail. Get a diode drop too high or too low and interesting results >will occur. > > > Russell > >-- >http://www.piclist.com#nomail Going offline? Don't AutoReply us! >email @spam@listserv@spam@spam_OUTmitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email spamBeGonelistservKILLspammitvma.mit.edu with SET PICList DIGEST in the body

Olin Lathrop <.....olin_piclistspam_OUTEMBEDINC.COM> wrote: > I wrote: > > Note quite. It's actually the net capacitance that's expected to be in > > parallel with the crystal. This includes the series combination of your > > external capacitors, plus the distributed capacitance of the PCB traces > > and the chip pins. > > Are you really sure, Dave? I thought (although can't find reference right > now) that the capacitance rating was the load capacitance required on the > output of the crystal to produce the proper phase shift at the rated > frequency. I further thought that the capacitor on the input side of the > crystal was only there to soften the edges and reduce the harmonics from > the driver. Yes, of course, that's why we use two capacitors to ground as we do, and not one capacitor directly across the crystal terminals. However, from the crystal's point of view, it just "sees" a certain amount of capacitance across its terminals, as derived above. This amount is specified so that its frequency can be calibrated accurately during the manufacturing process. There's a fairly informative page on this topic here: http://www.ieee-uffc.org/freqcontrol/quartz/vig/vigequiv.htm -- Dave Tweed -- http://www.piclist.com hint: To leave the PICList TakeThisOuTpiclist-unsubscribe-request.....TakeThisOuTmitvma.mit.edu>

> Maybe a dumb question about this crystal issue... Not at all dumb - just not as yet informed :-) > Why not just read the data sheet, do like they say there > and go on to more important design problems ? > Or is there any major problems with the design rules > in the data sheet ? In a word, yes. If you look at the data sheet they say to use the capacitance specified by the crystal manufacturer. The manufacturer specifies a load capacitance to bring the crystal to its correct resonance point. his will consist of the series combination of the input and output side capacitors (already religious war murmurings are heard from those who disagree with what I say ;-) ) plus any stray capacitance. So far so good. But wait, there's more. If you look at the data sheet and application notes from most microprocessor makers you'll find they have careful things to say about layout and crystal orientation and area enclosed in the loop between crystal and processor pins and lead length and tracks that cross across this loop and proximity to other pcb tracks and more. Some of this has to do with stability and some with startup and some with amplitude and some with waveform purity and some with a mix of these and some with the current phase of the moon. And they MIGHT talk about altering the input to output capacitor ratio and sizes for empirical best results in your application. Chorus: And they might not but you may well find yourself doing so in due course. And SOME manufacturers will show extra components - resistors in series with the crystal (to reduce "activity" and in parallel with the onboard oscillator inverter (to increase feedback) and often both at once. Chorus And they might not but .... And if the processor manufacturer does a die shrink and tells you (or don't) or if they change something informally and tell you or don't then you may suddenly find that the oscillator does not start or run as it did before. And they may explain what you should do about it. Chorus: And .... Occasionally, as has happened to me, the manufacturer may do "something" and swear black and blue that they have done nothing at all different, but you may find that when you plug in batches up to production code xxx that it works 100% but from batches after xxx a certain percentage will not start at all under certain ill defined conditions - even though you completely meet all spec sheet requirements. And they may expect that you will just accept their assurances and keep using their junk product. Chorus: ... . And what do you think I did ? :-) Crystal 'activity" relates to the energy which the crystal has imparted to it as it oscillates. A crystal is a somewhat mysterious electro mechanical device whose functioning is a function of (cut, electrode size, shape and position, case and crystal shape, drive and coupling) and numerous other things. It IS alas somewhat of a black art. Even though it SEEMS that it should be possible to get it right and keep getting it right. An overactive crystal can overheat and drift or in extreme cases literally shatter - this is unusual in low power CMOS circuits. Part of the problem is that the oscillator is an analogue circuit in a digital world. But I'm still surprised how hard it seems for them to get it right. Which shows how little I know about it all! Russell McMahon -- http://www.piclist.com hint: To leave the PICList .....piclist-unsubscribe-requestRemoveMEmitvma.mit.edu>

>> > Note quite. It's actually the net capacitance that's expected to be in >> > parallel with the crystal. This includes the series combination of your ... >>Are you really sure, Dave? I thought (although can't find reference right >>now) that the capacitance rating was the load capacitance required on the >>output of the crystal to produce the proper phase shift at the rated >>frequency. I further thought that the capacitor on the input side of the >>crystal was only there to soften the edges and reduce the harmonics from >>the driver. >Yes, it IS correct, and I think we've been through this before. I second that. The value quoted is the thevenin equivalent capacitance that is seen across the crystal terminals to tune the crystal to the inductive side of its phase shift. For this purpose the two capacitors normally fitted appear in series with each other, so if they are equal, then the effective capacitance is half the value. -- http://www.piclist.com hint: To leave the PICList RemoveMEpiclist-unsubscribe-requestspamBeGonemitvma.mit.edu>

> >>Are you really sure, Dave? I thought (although can't find reference right > >>now) that the capacitance rating was the load capacitance required on the > >>output of the crystal to produce the proper phase shift at the rated > >>frequency. I further thought that the capacitor on the input side of the > >>crystal was only there to soften the edges and reduce the harmonics from > >>the driver. > > >Yes, it IS correct, and I think we've been through this before. > > I second that. The value quoted is the thevenin equivalent capacitance that > is seen across the crystal terminals to tune the crystal to the inductive > side of its phase shift. For this purpose the two capacitors normally fitted > appear in series with each other, so if they are equal, then the effective > capacitance is half the value. Agree. But note that they sometimes cannot be equal for other reasons (like affect on startup performance, amplitude or waveform purity). The effective C is still the Thevenin equivalent (= C1 x C2 / (C1+C2) ) RM -- http://www.piclist.com hint: To leave the PICList spamBeGonepiclist-unsubscribe-request@spam@spam_OUTmitvma.mit.edu>

>But note that they sometimes cannot be equal for other reasons >(like affect on startup performance, amplitude or waveform purity). >The effective C is still the Thevenin equivalent (= C1 x C2 / (C1+C2) ) Yes, and this then goes into the area that someone else mentioned about resistors in series with the crystal, and some documentation specifying non-equal value capacitors. As an aside to this, I have sometimes figured that using unequal capacitors may help solve some start up problems, because as someone else mentioned, having the two capacitors with the crystal makes a PI network. Now these are common in transmitter output stages, partly because they make good impedance matching networks. Now working on the basis that a CMOS inverter has a high input impedance, and a low output impedance (when operated in linear mode to oscillate) then selecting capacitors so that the crystal/capacitor network is used to match from low to high impedance should help provide some effective voltage gain from the output of the inverter to its input. I would think the limit would probably be about C to 2C, with the 2C being the inverter output side. having the ratio go much more than this will put such a large value capacitor on the inverter output that it would start to have a major effect on the available output swing by causing slewrate limiting. The values of C and 2C would need to be selected using your formula above to give the 20 to 30pF load capacitance normally specified for crystals. -- http://www.piclist.com hint: To leave the PICList TakeThisOuTpiclist-unsubscribe-requestspammitvma.mit.edu>

> >But note that they sometimes cannot be equal for other reasons > >(like affect on startup performance, amplitude or waveform purity). > >The effective C is still the Thevenin equivalent (= C1 x C2 / (C1+C2) ) > > Yes, and this then goes into the area that someone else mentioned about > resistors in series with the crystal, and some documentation specifying > non-equal value capacitors. > > As an aside to this, I have sometimes figured that using unequal capacitors > may help solve some start up problems, because ............. Does ANYONE following this still think it's not magic ? :-) RM "Any technology, sufficiently advanced, is indistinguishable from magic" Arthur C Clarke "Any sufficiently advanced technology is indistinguishable from a rigged demo." Isaac Asimov -- http://www.piclist.com hint: To leave the PICList piclist-unsubscribe-requestEraseMEmitvma.mit.edu>

Hi Russell, Do you consider a normal Pi network to be black magic?! It's one of the simplest things I know of as far as analysis goes. It's only about a square root 's worth of computation more complex than Ohm's law. I also don't see how someone can agree with both my analogy of a Pi network AND the "caps are in series" idea. Do you consider the caps on either end of a Pi network to be in series? Sean At 12:57 AM 2/26/2003 +1300, you wrote: {Quote hidden}>Does ANYONE following this still think it's not magic ? :-) > > > RM > > >"Any technology, sufficiently advanced, is indistinguishable from magic" > > Arthur C Clarke > >"Any sufficiently advanced technology is indistinguishable from a rigged >demo." > > Isaac Asimov > >-- >http://www.piclist.com hint: To leave the PICList >@spam@piclist-unsubscribe-requestRemoveMEEraseMEmitvma.mit.edu -- http://www.piclist.com hint: To leave the PICList EraseMEpiclist-unsubscribe-request@spam@mitvma.mit.edu>