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'[PIC]: I2C slave with multiple addresses'
2002\12\12@083138 by Michael Rigby-Jones

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Just wanting a bit of opinion on how to make an I2C slave that responds to
several addresses.  Obviously the MSSP is out, so I am thinking about an SX
running a software slave, interfaced to my PIC with another bit bashed I2C
or SPI bus.  I don't think a PIC would be up to the job due to the tiny
amount of time between bits at 100KHz (i.e. 10us).  The micro would have to
do some protocol conversion between incomming and outgoing I2C busses so it
needs to have a reasonable amount of CPU time left after implementing the
slave.

The object is to emulate a setup that has an serial EEPROM, an ADC and a bus
expander all on one chip, but the master cannot be modified in any way so I
have to live with the three slave addresses.

Regards

Mike

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2002\12\12@113852 by Drew Vassallo

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>or SPI bus.  I don't think a PIC would be up to the job due to the tiny
>amount of time between bits at 100KHz (i.e. 10us).  The micro would have to

I'm not sure exactly what sort of processing you're doing between incoming
bits, but I've done a 50kHz I2C slave on a PIC running at 4MHz.  I would
guess that you could easily do a 20MHz slave at 100kHz and still leave some
time for processing.  Well, I shouldn't say "easily," because it's not
really easy, but it can be done.

--Andrew

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2002\12\13@133436 by Barry Gershenfeld

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If the I2C is done properly, the slave can "stretch" the time
between bits if it can jump on the clock line fast enough to
hold it down before the master releases it.  Then you can
buy some time to do the processing.   Even though you think
you can't modify the 100KHz rate of the master, you can.

Barry

>...
>amount of time between bits at 100KHz (i.e. 10us).  The micro would have to
>do some protocol conversion between incomming and outgoing I2C busses so it
>needs to have a reasonable amount of CPU time left after implementing the
>slave.
>Mike

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2002\12\13@155249 by Peter L. Peres

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On Fri, 13 Dec 2002, Barry Gershenfeld wrote:

*>If the I2C is done properly, the slave can "stretch" the time
*>between bits if it can jump on the clock line fast enough to
*>hold it down before the master releases it.  Then you can
*>buy some time to do the processing.   Even though you think
*>you can't modify the 100KHz rate of the master, you can.

Yes, and the way I did it with a 80C51 system I built was by using an
external RS flipflop that was set by the clock pulse falling edge and
reset by the mcu. Except I discovered that there are very few I2C masters
that respect the clock stretch spec. I do not remember what I used then
(the master was not a part of my project).

Peter

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2002\12\16@031420 by Michael Rigby-Jones

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> -----Original Message-----
> From: Barry Gershenfeld [SMTP:barry_gspamKILLspamZMICRO.COM]
> Sent: Friday, December 13, 2002 6:20 PM
> To:   .....PICLISTKILLspamspam.....mitvma.mit.edu
> Subject:      Re: [PIC]: I2C slave with multiple addresses
>
> If the I2C is done properly, the slave can "stretch" the time
> between bits if it can jump on the clock line fast enough to
> hold it down before the master releases it.  Then you can
> buy some time to do the processing.   Even though you think
> you can't modify the 100KHz rate of the master, you can.
>
> Barry
>
I am aware of clock stretching, but:
1) The master has requirements that the slave stretch each bit by no more
than 1 bit period at 100KHz, and each word for no more than 8 bit periods.
2) This doesn't help the fact that you need to sample at the full rate to
detect the start condition.

This can be alleviated to some extent by external hardware to detect start
and stop conditions which could interrupt the micro, but even so, the micro
is would also be running an SPI slave and a software I2C master with several
different protocol conversions.  I guess it might just about be doable with
a 20MHz PIC, or better a 40MHz 18 series.  Space is extremely tight, even
the second PIC is going to be a problem to get in so I cannot afford to add
much in the way of extra hardware.

TBH this seems to be crying out for a programmable logic implementation, but
my experience in these is very limited.

Regards

Mike

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