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'[PIC]: I2C Interrupt problems'
2002\10\03@101124 by Alan B. Pearce

face picon face
>It's not a bug, there is no configuration that gives start
>and stop bit interrupts in slave mode, only in master mode.


Yeah, I think I have discovered this. But all the MSSP documentation tells
you that there are four modes for slave I2C, where two of them have S and P
interrupts, and a seperate mode for master operation. This is carried over
into the AN about slave mode operation.

The only place that implies these two slave modes never interrupt is in the
description of the PIE register where it talks about the enabling of the SSP
interrupt, and actually lists the items that will cause an interrupt.

In the mean time I have implemented a timer interrupt using a spare timer to
monitor the P bit, and set my internal i2c idle flag back to idle when the P
bit is set.

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