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'[PIC]: How to make a simple and efficient computed'
2002\08\13@102104 by rusque (Listas)

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Hello,

   I'm porting a software that is running ok on a PIC16F877 to a PIC18F452
and now I'm having problems with the computed goto's.

   On the PIC16:

   MOVLW  0x01
   MOVWF  PCLATH
   MOVF   state,W_
   ADDWF  PCL,F_
   GOTO   case0
   GOTO   case1
   GOTO   case2
   etc

   On the PIC18 strange things happen:
   MOVLW  0x01
   MOVWF  PCLATH
   RLCF   dkstate, W_
   ADDWF  PCL
   GOTO   case0
   GOTO   case1
   GOTO   case2
   etc

   Someone have an example code about computed goto's on a PIC18?

   I've seen the "Unlimited computed goto (or table lookup)" page by Bob
Ammerman on PICLIST, but it seens overkill. I need very fast code.

   Thank you very much,

   Brusque

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2002\08\13@113441 by Olin Lathrop

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>     I'm porting a software that is running ok on a PIC16F877 to a
PIC18F452
{Quote hidden}

First, DOCUMENT YOUR CODE!!!  If you had forced yourself to explain what
each instruction was doing, you might have found the bug yourself.

Second, why are you hard setting PCLATH to 1?  This is very bad programming
practise and a bug waiting to happen (maybe it just did).  Your code will
only work if all the GOTO instructions are located from 100h - 1FFh.  This
should be derived symbolically, or at least the same symbolic constant used
to force the address of the table as derive the value to stick into PCLATH.

Note that the PIC16 addresses program memory as whole words, with each
instruction taking up one word.  The PIC18 addresses program memory in
bytes, with instructions taking up either 2 or 4 bytes.  The PIC18 GOTO
instruction takes up 4 bytes, so the DKSTATE needs to be multiplied be 4,
not 2, before used to index into the table.  Also, this type of GOTO table
can only support up to 64 entries because that are all that fit into a 256
byte region.  Larger tables require computation of the PCLATH value, since a
single PCLATH value addresses a 256 byte region.

Note also that the PIC18 has a PCLATU register in addition to PCLATH.  You
can get away with ignoring PCLATU on the 18F452 because it only has 32Kbytes
of program memory, but this is another bug waiting to happen.  I would use
assembly conditionals to insert the proper code if this is ever ported to a
machine with more than 64Kbytes.  Or, at least generate an assembly error in
that case so that someone is forced to inspect the code.  It's easy to do
now, a real pain 4 years from now when you've forgotten all about this
little section of code.  While you're at it, you can generate an assembly
error automatically is someone tries to grow the table beyond 64 entries.


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2002\08\13@130041 by Harold M Hallikainen

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       Below is some working code. Note that the branch instruction is two
bytes long, but the goto is four, thus some of the problem. Also, you
need to use the rlncf so you don't accidentally end up on an odd address
(though that might be thrown out when it gets loaded into the pc).

Harold

       movlw   high(RXJA)
       movwf   pclath          ; Update pc latch for table calls
       rlncf   RxState,0       ; Get receive state*2 in W since bra instructions are 2
bytes long
       andlw   0x07            ; Get rid of invalid states
       addlw   low(RXJA)       ; w now holds low half of address we want to jump to
       skpnc
       incf    pclath,1        ; Add carry into pclath if needed
       movwf   pcl             ; Jump into table
RXJA
       bra     RxState0        ; Go handle wait for FE (state 0)
       bra     RxState1        ; Go handle wait for start code (state 1)
       bra     RxState2        ; Go handle receive data (state 2)
       return                  ; should never be executed (invalid state 3)



On Tue, 13 Aug 2002 11:21:49 -0300 "Edson Brusque (Listas)"
<brusque.listasspamKILLspamCITRONICS.COM.BR> writes:
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2002\08\13@173001 by rusque (Listas)

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Hello Olin,

> First, DOCUMENT YOUR CODE!!!  If you had forced yourself to explain what
> each instruction was doing, you might have found the bug yourself.

   :) I agree with you. But this is documented on the starting of the file.

> Second, why are you hard setting PCLATH to 1?  This is very bad
programming
> practise and a bug waiting to happen (maybe it just did).  Your code will
> only work if all the GOTO instructions are located from 100h - 1FFh.  This
> should be derived symbolically, or at least the same symbolic constant
used
> to force the address of the table as derive the value to stick into
PCLATH.

   This is the reason why this code is documented on the starting of the
file with a big WARNING! I'm using PCH (by CCS) and haven't found a way to
derive the PCLATH value simbolically.

   CCS have a label_address() function but I can't find a way to make
something like "PCLATH = hi(label_address(dkstart));" to work.

> Note that the PIC16 addresses program memory as whole words, with each
> instruction taking up one word.  The PIC18 addresses program memory in
> bytes, with instructions taking up either 2 or 4 bytes.  The PIC18 GOTO
> instruction takes up 4 bytes, so the DKSTATE needs to be multiplied be 4,
> not 2, before used to index into the table.  Also, this type of GOTO table
> can only support up to 64 entries because that are all that fit into a 256
> byte region.  Larger tables require computation of the PCLATH value, since
a
> single PCLATH value addresses a 256 byte region.

   Yes, this is the problem. I've changed the code to:
       MOVLW  0x01
       MOVWF  PCLATH
       MOVF   dkstate,W_
       MULLW  4
       MOVF   PRODL,W_
       ADDWF  PCL
       GOTO   case0
       GOTO   case1
       GOTO   case2

   and now it seens to be working fine. The 64 "cases" limitation isn't a
issue in this application. I'm taking the precautions to not having PCL
"pages" crossing.

> Note also that the PIC18 has a PCLATU register in addition to PCLATH.  You
> can get away with ignoring PCLATU on the 18F452 because it only has
32Kbytes
> of program memory, but this is another bug waiting to happen.  I would use
> assembly conditionals to insert the proper code if this is ever ported to
a
> machine with more than 64Kbytes.  Or, at least generate an assembly error
in
> that case so that someone is forced to inspect the code.  It's easy to do
> now, a real pain 4 years from now when you've forgotten all about this
> little section of code.  While you're at it, you can generate an assembly
> error automatically is someone tries to grow the table beyond 64 entries.

   This is a good idea. I don't think this code will ever be implemented on
more powerfull machines, but better be safe than sorry. :)

   Thank you very much,

   Brusque

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2002\08\13@173012 by rusque (Listas)
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Hello Harold,

>         Below is some working code. Note that the branch instruction is
two
> bytes long, but the goto is four, thus some of the problem.

   yes, this was the problem.

>Also, you
> need to use the rlncf so you don't accidentally end up on an odd address
> (though that might be thrown out when it gets loaded into the pc).

   The rlncf is a bit strange for me, as it makes "0b10110000" into
"0b01100001" (the eighth bit turns first), so you have to be sure about the
state of this bit. Not a problem in this code anyway. Maybe I'll use it.

   Your code is smart. Just don't know how to port it to CCS... oh boy!

   Thank you,

   Brusque

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2002\08\13@174719 by Olin Lathrop

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> > First, DOCUMENT YOUR CODE!!!  If you had forced yourself to explain what
> > each instruction was doing, you might have found the bug yourself.
>
>     :) I agree with you. But this is documented on the starting of the
file.

That's no excuse.  Yes, header comments are good, but individual details
must be documented too.

>     This is the reason why this code is documented on the starting of the
> file with a big WARNING! I'm using PCH (by CCS) and haven't found a way to
> derive the PCLATH value simbolically.

I thought CCS was a C compiler, but the code you showed was in assembler.

>     This is a good idea. I don't think this code will ever be implemented
on
> more powerfull machines,

Yeah, right.  That's probably what the original author who wrote the 16F877
code thought too.

> but better be safe than sorry. :)

Yes.


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2002\08\13@185530 by rusque (Listas)

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Hello Olin,

> I thought CCS was a C compiler, but the code you showed was in assembler.

   that's because you can use inline assembly on a C compiler when you want
maximum optimization. CCS assembly support is very good, but it always lacks
something when you really need...

> >     This is a good idea. I don't think this code will ever be
implemented
> > on more powerfull machines,
> Yeah, right.  That's probably what the original author who wrote the
16F877
> code thought too.

   Hahaha, good point but I'm the original author and I only wrote the code
for the 16F877 because the 18F452s haven't arrived at that time and I really
was needing something working to send to the client.

   Best regards,

   Brusque

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2002\08\13@185548 by rusque (Listas)

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Hello Olin, Harold et all,

   I've been studing (mmm, is this conjugation correct?) the Bob's code at
http://www.piclist.com/techref/microchip/18c/ongoto-ba.htm and adapted it to
my situation:

// COMPUTED GOTO
#asm
rlncf state, W_  // put state*2
movwf gotoarg    //     in gotoarg
rcall comp_goto  // This is the trick, comp_goto deals with TOSL and TOSH
goto  case00     //     then returns to the correct "goto caseXX"
goto  case01
goto  case02
goto  case03

comp_goto:
rlncf  gotoarg, W_    // add gotoarg*2
addwf  TOSL,F         //    on TOSL
movlw  0
addwfc TOSH,F         // if carry, increments TOSH
return                // returns directly to the "goto caseXX"
#endasm

   It's not very efficient. My "brute-force" method uses 8 instruction and
Bob's method uses 14, but it works.

   Bob's code have 16-bit limit, my implementation is 7-bit (128 gotos
possible).

   Now I'll try to optimize it.

   Best regards,

   Brusque

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2002\08\13@201016 by Harold M Hallikainen

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On Tue, 13 Aug 2002 18:29:43 -0300 "Edson Brusque (Listas)"
<TakeThisOuTbrusque.listasEraseMEspamspam_OUTCITRONICS.COM.BR> writes:
>     The rlncf is a bit strange for me, as it makes "0b10110000" into
> "0b01100001" (the eighth bit turns first), so you have to be sure
> about the
> state of this bit. Not a problem in this code anyway. Maybe I'll use
> it.
>

       Oops! I forgot that the "no carry" means to just leave it out of the
loop, but there is, nonetheless, a loop of the msb to the lsb. Should
just do a ANDLW 0xfe    afterwards to clear that bit, or do an rlcf, but do
a clrc first...

Harold


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2002\08\13@221412 by Harold M Hallikainen

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As I recall, the application is in C, so you could always use a
switch-case statement and let the compiler deal with it!

Harold

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2002\08\13@222246 by Andrew Warren

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Harold M Hallikainen <EraseMEPICLISTspammitvma.mit.edu> wrote:

> > The rlncf is a bit strange for me, as it makes "0b10110000" into
> > "0b01100001" (the eighth bit turns first), so you have to be sure
> > about the state of this bit.
>
> Oops! I forgot that the "no carry" means to just leave it out of
> the loop, but there is, nonetheless, a loop of the msb to the lsb.
> Should just do a ANDLW 0xfe    afterwards to clear that bit, or do
> an rlcf, but do a clrc first...

   I missed the start of this thread, so I haven't seen the code,
   but can't you just add WREG to itself to do this?

   -Andrew

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2002\08\14@115205 by rusque (Listas)

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Hello Andrew,

>     I missed the start of this thread, so I haven't seen the code,
>     but can't you just add WREG to itself to do this?

   yes, good point. You can double WREG value doing:
       addwf WREG, W

   Thanks,

   Brusque

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2002\08\14@123752 by rusque (Listas)

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Hello Harold et all,

> As I recall, the application is in C, so you could always use a
> switch-case statement and let the compiler deal with it!

   yes, but the Assembly code generated by the C compiler isn't that tight.

   I managed to make my computed goto code a little more smart. It have a
limitation of 63 possible GOTOs, but executes on just 11 instruction cycles:

// COMPUTED GOTO
#asm
rlncf state, W_     // put state*4
addwf WREG, W_      //     in WREG
addlw 6             // align future PUSH position
push                // put PCL+2 on the TOS
addwf  TOSL,F       // add WREG to TOSL
clrf   WREG
addwfc TOSH,F       // if carry, increments TOSH
return              // returns directly to the "goto caseXX"

goto  case00
goto  case01
goto  case02
goto  case03
       etc...
#endasm

   Althought this code works perfectly while I'm simulating it in MPLAB,
but doesn't work on the device. This is very strange.

   I've made some tests and it seens to be a bug on the PIC18F452 part(!).
It's like the STKPTR isn't incremented when PUSH is executed.

   Someone want to try it?

   Best regards,

   Brusque

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2002\08\14@171724 by Harold M Hallikainen

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On Tue, 13 Aug 2002 18:42:15 -0700 Andrew Warren <RemoveMEaiwKILLspamspamCYPRESS.COM>
writes:
>     I missed the start of this thread, so I haven't seen the code,
>     but can't you just add WREG to itself to do this?
>

       Yes you can! And why didn't I do it?  Too clever, I guess. Just didn't
think of it! That saves us one instruction, though putting an andlw after
the add and prior to moving it to pcl would allow us to force the lsb low
and force some higher bits low to prevent us jumping to invalid states.
Adding wreg to itself is a very clever idea, though!

Harold


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