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'[PIC]: Fast manchester decode (code challenge)'
I've been playing with some RF modules, and I'm using manchester
encoding to to provide a DC balanced code. Encoding 4 bit nibbles into
8 bit bytes with a lookup table is very fast and requires little memory,
but decoding is slightly trickier if you also want to check the code is
valid. I came up with the following that uses 1 byte of GPR and
executes in 13 cycles if the manchester code is valid, or jumps to an
error handler in 8 cycles if not.
I don't need the speed, but I'm pretty sure this can be done in less
cycles, anyone see a better way?
; on entry manchester encoded byte held in w,
; if code is valid, decoded byte held in w on exit
; if code is invalid, jumps to error handler
; if valid incomming byte looks like a !a b !b c !c d !d
xorlw 0x55 ; Invert the second phase of each bit.
; First and second phases should now match
; if valid i.e. aabbccdd
movwf enc ; Take a copy of the result
rrf enc,f ; enc = xaabbccd
xorwf enc,w ; (w)aabbccdd
; (enc)xaabbccd XOR
andlw 0x55 ; Clear bits 1,3,5,7. The value in W is now zero if
; the manchester code was valid i.e. both phases
; of each bit are complimentry
skpz ; If valid skip to decoding
goto man_err ; invalid code, jump to error handler
; enc still holds xaabbccd, our target is 0000abcd
; bits 0 & 1 are already in the correct position
movf enc,w ; w = xaabbccd
andlw 0x03 ; w = 000000cd
iorlw 0x04 ; w = 00000bcd
iorlw 0x08 ; w = 0000abcd
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Michael Rigby-Jones <MIT.EDU> wrote: piclist
> I came up with the following that uses 1 byte of GPR and executes in
> 13 cycles if the manchester code is valid, or jumps to an error handler
> in 8 cycles if not.
> I don't need the speed, but I'm pretty sure this can be done in less
> cycles, anyone see a better way?
; Enter with received byte in REG. Jumps to INVALID if the
; Manchester code is invalid.
RADIX = DEC
RRF REG,W ;Copy REG's odd-numbered bits to W's
;even-numbered bit positions.
XORWF ENC,W ;Each even-numbered bit of W holds "1"
;if REG's odd bits are complements of
;REG's even bits.
XORLW 11111111B ;Now, each even-numbered bit of W holds
;"0" if REG's odd bits are complements
;of REG's even bits.
ANDLW 01010101B ;Mask off all but W's even bits.
BNZ INVALID ;If any of them are non-zero, the word in
;REG was not valid. Jump.
=== Andrew Warren - ix.netcom.comfastfwd
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