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'[PIC]: FSR'
2000\11\14@171853 by Barry Gershenfeld

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Whenever someone mentions the FSR (file select register) they
always seem to quickly [religious reference deleted] and then
add, "But I would never do it this way".   The FSR seems like
the obvious way to collect a short frame of data and write
it to a group of registers in memory.  Is there a dark side
of this mechanism I need to know about?

Thanks.

Barry

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2000\11\14@172927 by Shawn Yates

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I have used the FSR to make one input/output routine work on multiple ports.

I had two input/output pairs that used the same data format so when laying
out the board, I made sure that the ins were both on the same pin of
different ports (ie A0 and B0) and both the out's were connected to the same
pin on the port (ie A1 and B1).  Then I have one transmitt routine and one
receive routine that accesses 00h,0 for input or 00h,1 for output and all I
have to do load the FSR appropriatley before calling the routine.

I have never had any problems with the FSR.  I often which there were two or
three of them, and even better a BSR (bit select register?) so that I could
write one routine to manipulate different bits depending on the value of the
BSR

       btfsc   PortB, BSR

Oh well.  Some day.

Shawn


{Original Message removed}

2000\11\14@184454 by Bob Ammerman

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----- Original Message -----
From: Barry Gershenfeld <spam_OUTbarryTakeThisOuTspamZMICRO.COM>
To: <.....PICLISTKILLspamspam@spam@MITVMA.MIT.EDU>
Sent: Tuesday, November 14, 2000 5:10 PM
Subject: [PIC]: FSR


{Quote hidden}

Not at all. The FSR is your friend (as long as you're careful).

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\11\14@190355 by Tony Nixon

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> > Whenever someone mentions the FSR (file select register) they
> > always seem to quickly [religious reference deleted] and then
> > add, "But I would never do it this way".   The FSR seems like
> > the obvious way to collect a short frame of data and write
> > it to a group of registers in memory.  Is there a dark side
> > of this mechanism I need to know about?

On most PICs no. Just make sure the FSR does not access anything but the
RAM allocated for a buffer or table.

One note about PICs with > 256 bytes of RAM is that you need to take
note of the STATUS,IRP bit. This is the 9th FSR bit so you can access
RAM above 255.

PICs such as 16F876/877 will make use of it.

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2000\11\14@191639 by Barry Gershenfeld

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>Not at all. The FSR is your friend (as long as you're careful).
>
>Bob Ammerman

In other words, keep an eye on those bank bits and so on?

Barry

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2000\11\14@194520 by Tony Nixon

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Barry Gershenfeld wrote:
>
> >Not at all. The FSR is your friend (as long as you're careful).
> >
> >Bob Ammerman
>
> In other words, keep an eye on those bank bits and so on?


Only the STATUS,IRP bit.

STATUS,RP0 & RP1 are not used with indirect addressing.

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2000\11\14@201422 by Dan Michaels

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At 02:10 PM 11/14/2000 -0800, you wrote:
>Whenever someone mentions the FSR (file select register) they
>always seem to quickly [religious reference deleted] and then
>add, "But I would never do it this way".   The FSR seems like
>the obvious way to collect a short frame of data and write
>it to a group of registers in memory.  Is there a dark side
>of this mechanism I need to know about?
>

No - so long as you understand the concept of indirect
addressing. Only thing wrong with the FSR is there aren't
two of them -[rectified on some newer PICs].

Just pay attention to the paging bits as others have mentioned,
and use the following to load a variable address into FSR:

movlw   variable_name
movwf   FSR

Using < movlw > is the key.

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2000\11\14@202916 by Bob Ammerman

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Also, if you touch FSR in interrupt code be sure to save/restore it!

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2000\11\14@212238 by Andrew Warren

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Bob Ammerman <EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU> wrote:

> Also, if you touch FSR in interrupt code be sure to save/restore it!

And, since no one's mentioned this yet...

Remember that in the 16C5x processors, the unused upper bits of the
FSR always read as "1".

On the 16C54, for instance, the upper three bits are set that way,
which means that the FSR will always contain an address in the range
0xE0-0xFF.

Therefore, when you test the FSR for equality to some number, you
must either AND the FSR with 00011111 or OR the number with 11100000
before the comparison.

That's a drag, but if you're just using the FSR to clear RAM, the
"111" in the upper three bit-positions actually helps:

       MOVLW   5       ;Start clearing RAM at register 0x05.
       MOVWF   FSR

   LOOP:

       CLRF    INDF
       INCFSZ  FSR     ;Stop clearing RAM at register 0x1F.
       GOTO    LOOP

The "INCFSZ" will get us out of the loop after we've cleared register
0x1F, even though our code doesn't explicitly compare FSR to 0x1F
anywhere.  It works like this:

   The FSR starts at 11100101 (we write 0x05 to it, but the high 3
   bits are always set), then we iterate through the loop until the
   FSR holds 11111111 (0x1F with the high 3 bits set).

   At that point, our INCFSZ reads the FSR (11111111) and increments
   it to 00000000.  That triggers the "skip" part of the INCFSZ,
   even though FSR will hold 11100000, not 00000000, after we exit
   the loop.

-Andrew


=== Andrew Warren --- aiwspamspam_OUTcypress.com
=== Cypress Semiconductor Corporation
=== Interface Products Division, S.D.
===
=== The opinions expressed above do
=== not necessarily represent those of
=== Cypress Semiconductor Corporation.

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2000\11\14@214253 by Bob Ammerman

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So to summarize this thread:

Yeah, the FSR _is_ your friend, but there is a whole list of gotcha's to
worry about!

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

2000\11\14@220919 by Harold M Hallikainen

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       Also watch out if use an FSR in both mainline and interrupt code! On
PICs with just one FSR, I've added an FSR save and restore to my
interrupts. On PICs with more than one FSR, I use one for interrupts,
another for mainline, and whatever else is left where ever, but
carefully...

Harold


On Tue, 14 Nov 2000 16:08:02 -0800 Barry Gershenfeld <@spam@barryKILLspamspamZMICRO.COM>
writes:
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2000\11\15@120520 by Olin Lathrop

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> Whenever someone mentions the FSR (file select register) they
> always seem to quickly [religious reference deleted] and then
> add, "But I would never do it this way".   The FSR seems like
> the obvious way to collect a short frame of data and write
> it to a group of registers in memory.  Is there a dark side
> of this mechanism I need to know about?

It is more efficient to address the register directly when you know which
ones they are specifically.  FSR is the only means to access buffers,
arrays, etc.

The dark sides of FSR are:

1 - You have to remember to save/restore FSR in the interrupt routine if you
use it in the interrupt routine and in the main code.

2 - You have to make sure the indirect register bank setting is correct,
which is different from the direct register bank setting on 16C parts.

3 - The LFSR instruction on the 18C series is broken, don't use it.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, KILLspamolinKILLspamspamcognivis.com, http://www.cognivis.com

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2000\11\15@130549 by jamesnewton

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Could you further comment on "The LFSR instruction on the 18C series is
broken, don't use it."?

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2000\11\15@140610 by Bob Ammerman

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Another use or two or three of FSR:

To pass an argument by reference to a subroutine so that one subroutine can
be used with varying data. I use this for code that manages debounce state
on buttons.

To allow the same code to be used to hit two different I/O ports.

And my favorite:

I sometimes use 'open-collector' type communication channels. To implement
these one would typically set the port register bit to zero, and then use
the TRIS register bit to control the output (zero or float).

In order to avoid bank switch inside tight loops, I'll do this:

   movlw    TRISB
   movwf    FSR

now I can:

   bcf        INDF,n
or
   bsf        INDF,n

to output my bits without having to bank switch.

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2000\11\15@142727 by Dan Michaels

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Bob Ammerman wrote:
..........
>And my favorite:
>
>I sometimes use 'open-collector' type communication channels. To implement
>these one would typically set the port register bit to zero, and then use
>the TRIS register bit to control the output (zero or float).
>
>In order to avoid bank switch inside tight loops, I'll do this:
>
>    movlw    TRISB
>    movwf    FSR
>
> now I can:
>
>    bcf        INDF,n
> or
>    bsf        INDF,n
>
>to output my bits without having to bank switch.
>

Unfortunately, then you have to turn around and reload
FSR to point to your data buffer. As mentioned yesterday,
how much easier PIClife would be, if there were 2 FSRs.
This is the real gotcha -[all the rest is just parts].

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2000\11\15@160039 by Olin Lathrop

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> Unfortunately, then you have to turn around and reload
> FSR to point to your data buffer. As mentioned yesterday,
> how much easier PIClife would be, if there were 2 FSRs.
> This is the real gotcha -[all the rest is just parts].

Note that 17 and 18 series PICs do have multiple FSRs.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, spamBeGoneolinspamBeGonespamcognivis.com, http://www.cognivis.com

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2000\11\15@231244 by jamesnewton

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Err.. Bob, I don't get that last one, if the top few bits of FSR control the
bank, then pointing FSR to TRISB still limits you to registers in the same
bank as TRISB right? Or is this something that is different on one of the
(many) PICs I have not worked on: I'm getting more and more SX specific so
sometimes I forget things about PICs other than the 5x's...

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