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'[PIC]: Delay loops that don't need any RAM'
2001\10\29@205252 by Dwayne Reid

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resent with the 'PIC' topic tag

Good day to all.

I'm adding some major new functions to some code written by a colleague and
started getting short on RAM.  Rather than re-target to a different
processor, I started looking through his code to see where I could free up RAM.

One area that kind of jumped out at me was his delay routines.  His
routines used the standard 'decfz  somereg,F' technique.  I could free up a
couple of bytes of RAM if I re-wrote his routines to just use W.  Thats
real easy on the 14 bit core parts: 'addlw -1' works just fine.  But this
was on the 12 bit core chips.

I remembered that John Payson came up with a neat 2's complement technique
for complementing the value contained in W and works on all PIC cores:

; complement W
    addwf       FSR,W       ;can be any register that does not change
between these
    subwf       FSR,W       ;  two instructions
;done!

A 2's complement is simply the 1's complement of a number plus 1.  If I
took the 1's complement a number, then took the 2's complement of that same
number, I'd wind up with the original number plus 1.  In other words: a way
to increment W without needing any RAM.

It works!

The version I came up with looks like this:

Delay500
    movlw       -(.500/6)     ;desired delay / loop delay

Delay500Loop
    xorlw       0xFF            ;1's complement W
    addwf       FSR,W           ;2's complement W
    subwf       FSR,W
    skpz                        ;W wrap to 0?
      goto      Delay500Loop    ;loop is 6 instructions


dwayne


Dwayne Reid   <spam_OUTdwaynerTakeThisOuTspamplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
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2001\10\31@125645 by Dwayne Reid

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Good day again!

I got intrigued with this business of incrementing W on a 12 bit core PIC
and tried something a little different.  Again: this technique should work
on all PIC parts for those who are writing code that is intended to be
portable or re-usable.

The first routine I posted seems to work just fine:

Delay500
    movlw       -(.500/6)     ;desired delay / loop delay

Delay500Loop
    xorlw       0xFF            ;1's complement W
    addwf       FSR,W           ;2's complement W
    subwf       FSR,W
    skpz                        ;W wrap to 0?
      goto      Delay500Loop    ;loop is 6 instructions

But I got thinking about the possibility of using a pair of 2's complement
instructions in succession.  An easy way to complement W is to do a 'subwf
SOMEREG,W' where that register contains 0.  But if I do it twice, it
doesn't matter what the register contains because the 2nd subtraction
cancels the effect of the first.

Of course, this is now a 2 instruction 2 cycle NOP!  W ends up with same
value it started out with at the end of the 2nd subwf.  But what if the
register I was subtracting from increased by 1 between the
instructions?  Might that fix the problem?

So far, the answer seems to be YES!  As you might guess, the register I
want to use as the target for the 'subwf' instructions is PCL.  So now my
little delay loop looks like:

Delay500
    movlw       -(.500/5)     ;desired delay / loop delay

Delay500Loop                    ;loop is 5 cycles
    subwf       PCL,W           ;these 2 instr increment W by 1
    subwf       PCL,W
    skpz                        ;W wrap to 0?
      goto      Delay500Loop    ;

This little loop should be completely position independent and PCLATH does
not matter since PCL is not actually being changed.  And, again, even
though it is written for the 12 bit core devices, it should work on all PIC
families.

Thought?  Comments?

dwayne


Dwayne Reid   <.....dwaynerKILLspamspam@spam@planet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
(780) 489-3199 voice          (780) 487-6397 fax

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2001\10\31@125654 by Drew Vassallo

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>Delay500
>     movlw       -(.500/6)     ;desired delay / loop delay
>
>Delay500Loop
>     xorlw       0xFF            ;1's complement W
>     addwf       FSR,W           ;2's complement W
>     subwf       FSR,W
>     skpz                        ;W wrap to 0?
>       goto      Delay500Loop    ;loop is 6 instructions

I've seen this before somewhere, but it's still neat.  But, since nearly all
of my projects (and I'm sure others, too) use "temp" registers for
calculations, counters, etc., I would be surprised if one file couldn't be
freed for use with a standard delay loop.  Plus, you could reduce the
program memory by over 1/2.

Also, note that the routine above is limited to 256 times through the loop.
The more delay you need, the more program memory is required due to NOPs.

--Andrew

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2001\10\31@165941 by Ian Chapman

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Dwayne Reid <dwaynerspamKILLspamPLANET.EON.NET> wrote:
>    subwf       PCL,W           ;these 2 instr increment W by 1
>    subwf       PCL,W

Impressive!  This certainly wins my vote for the most imaginative use of
the PCL register.  Or are there other candidates?  ;-)
--
Ian Chapman
Chapmip Technology, UK

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'[PIC]: Delay loops that don't need any RAM'
2001\11\01@094209 by o-8859-1?Q?K=FCbek_Tony?=
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Hi,

Dwayne Reid wrote:
<snip>
{Quote hidden}

Neat ! however..

a bit concerned over 8 bit pcl rollover ( i.e. from 0xFF -> 0x00 )
lets try with the following:
Let's try with 1 loop delay and let PCL have the value 0xFF at the
first subwf.

W = 1 -> a 5 cycle delay ( excluding and returns or calls )

Delay500Loop_1                  ; W = 1
    subwf       PCL,W          ; PCL = 0xFF ( 255 ) -> F-W = 254
    subwf       PCL,W            ; PCL = 0x00 -> F-W = 254 !!! gotcha...
    skpz                       ;
     goto      Delay500Loop    ; loop forever....

But apart from that elegant solution,
hope I'm correct been a while without pic's :)

/Tony







Tony Kübek, Flintab AB            
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2001\11\01@101538 by Scott Dattalo

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On Thu, 1 Nov 2001, K|bek Tony wrote:

> Neat ! however..
>
> a bit concerned over 8 bit pcl rollover ( i.e. from 0xFF -> 0x00 )
> lets try with the following:
> Let's try with 1 loop delay and let PCL have the value 0xFF at the
> first subwf.
>
> W = 1 -> a 5 cycle delay ( excluding and returns or calls )
>
> Delay500Loop_1                  ; W = 1
>      subwf       PCL,W          ; PCL = 0xFF ( 255 ) -> F-W = 254
>      subwf       PCL,W            ; PCL = 0x00 -> F-W = 254 !!! gotcha...
>      skpz                       ;
>       goto      Delay500Loop    ; loop forever....

Tony,

It's actually 0 - 254 which yields 2. Roll over is no problem.

Dwayne has stumbled on a truly devious piece of code that couldn't have
been posted on a better day of the year!

Scott

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2001\11\01@153644 by Dwayne Reid

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At 03:18 PM 11/1/01 +0100, Kübek Tony wrote:

>Neat ! however..
>
>a bit concerned over 8 bit pcl rollover ( i.e. from 0xFF -> 0x00 )
>lets try with the following:
>Let's try with 1 loop delay and let PCL have the value 0xFF at the
>first subwf.
>
>W = 1 -> a 5 cycle delay ( excluding and returns or calls )
>
>Delay500Loop_1                  ; W = 1
>      subwf       PCL,W          ; PCL = 0xFF ( 255 ) -> F-W = 254
>      subwf       PCL,W            ; PCL = 0x00 -> F-W = 254 !!! gotcha...
>      skpz                       ;
>       goto      Delay500Loop    ; loop forever....

Nope - no gotcha!  W is an 8 bit register.  I simulated with boundary conditions as you describe and there was no problem whatsoever.

It *does* work!  (MPLAB 5.40, tried with both 12c508 & 16f84).

dwayne



Dwayne Reid   <@spam@dwaynerKILLspamspamplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
(780) 489-3199 voice          (780) 487-6397 fax

Celebrating 17 years of Engineering Innovation (1984 - 2001)

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2001\11\01@180716 by Olin Lathrop

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>>
Neat ! however..

a bit concerned over 8 bit pcl rollover ( i.e. from 0xFF -> 0x00 )
<<

It will still work since the high bits can't feed back into the low bits,
and the low bits are still correct.

>>
Delay500Loop_1                  ; W = 1
    subwf       PCL,W          ; PCL = 0xFF ( 255 ) -> F-W = 254
    subwf       PCL,W            ; PCL = 0x00 -> F-W = 254 !!! gotcha...
<<

No gotcha.  0 - 254 = 2, just like it would with any other starting value of
PCL.


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(978) 742-9014, RemoveMEolinTakeThisOuTspamembedinc.com, http://www.embedinc.com

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2001\11\02@045655 by o-8859-1?Q?K=FCbek_Tony?=

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Hi,

Scott, Olin and Dwayne kindly corrected my blunder :)
as I said to long without pic's.

Isn't the first time that subwf have bitten me backwards.

Excellent.

/Tony


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2001\11\02@102642 by Lawrence Lile

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I simulated this yesterday, pumping a number of values into PCL and w just
to see if I could trick it into failing.  If you enter with 0 in w, the loop
executes 256 times.  That makes sense if you think about it, but I think it
is dangerous. Perhaps a robust algorithm would test for zero and kick out
before entering the delay loop.

Now how could somebody convince a C compiler to use this algorithm for
RAM-free software delays? It seems to me that passing an argument in C would
most likely eat up precious RAM, even if the algorithm itself was dropped
into assembler, no?

--Lawrence

{Original Message removed}

2001\11\02@124324 by Scott Dattalo

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On Fri, 2 Nov 2001, Lawrence Lile wrote:

> Now how could somebody convince a C compiler to use this algorithm for
> RAM-free software delays? It seems to me that passing an argument in C would
> most likely eat up precious RAM, even if the algorithm itself was dropped
> into assembler, no?

It may just depend on whether or not you have the source to the
C-compiler. :)

Scott

PS. SDCC is moving along more quickly than I expected. A beta may be ready
January instead of March.

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2001\11\03@062727 by Gerhard Fiedler

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At 09:25 11/02/2001 -0600, Lawrence Lile wrote:
>Now how could somebody convince a C compiler to use this algorithm for
>RAM-free software delays? It seems to me that passing an argument in C would
>most likely eat up precious RAM, even if the algorithm itself was dropped
>into assembler, no?

As someone already mentioned, most programs will have some kind of scratch
RAM that they can use for such purposes. This is especially true for C
compilers. There are a number of different kinds of "scratch RAM" that are
available for this, and the probablility that such code will not increase
the overall amount of RAM used even if it uses 1 or 2 byte file storage is
pretty high.

Besides, it may be possible write a macro that does this loop. The use of
the W register may create a problem, though.

ge

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2001\11\03@170650 by Olin Lathrop

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>Now how could somebody convince a C compiler to use this algorithm for
>RAM-free software delays? It seems to me that passing an argument in C
would
>most likely eat up precious RAM, even if the algorithm itself was dropped
>into assembler, no?

If your system is so small and you're so close to the edge that you can't
afford one more RAM location, you have no business writing in C.


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2001\11\03@183759 by Andrew E. Kalman

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Re:

>Now how could somebody convince a C compiler to use this algorithm for
>RAM-free software delays? It seems to me that passing an argument in C would
>most likely eat up precious RAM, even if the algorithm itself was dropped
into assembler, no?

Practically speaking, passing a single 8-bit-sized parameter to a
HI-TECH PICC function will have no effect on your overall RAM usage.
That's because 8-bit params are passed in W. You can then code the
guts of the function either in C or in-line assembly. For larger
parameters (e.g. ints), they're passed in the btemp registers, IIRC.

The overall RAM usage is a little complicated to predict, because the
compiler is smart about overlaying RAM. Function call graph depth and
max(sizeof(parameters of your functions)) will dictate how much RAM
you need.

Since HI-TECH places all parameters in RAM bank 0 exclusively, it's
unlikely that passing a single 8-bit parameter will have any affect
on your application's RAM requirements, assuming your application is
reasonably complex (i.e. functions with parameters call functions
with parameters, etc.).

Be sure to enable the generation of listing files when you build your
project(s), and use maximum optimization (level 9). You can play
around with different schemes to see which ones result in the
smallest RAM and/or ROM size.

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