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PICList Thread
'[PIC]: Calling subroutines in a 16C57 Paged Memory'
2001\04\04@135439 by Ian Hynes

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face
PICers,

Suppose we have a 16C57 and, for convenience, we have all the LCD
routines, let's say, in PAGE 1 and we want to call them from PAGE 0.

You don't seem able to set it up lik so:-

;**********************************************************
org  0x00     ;PAGE 0, lower half

org 0x0100    ;PAGE 0, upper half

Page_1
Bank_1
call subr_1

And have the termination of subr_1  looking like :-

org    0x0200     ;Subroutines must go in lower half of PAGE 0

subr_1 <.. Do an LCD display ..>
            Page_0            ;And return to where we were in Page_0
            Bank_0
            retlw    0x00

org    0x0300     ;Upper half of PAGE_0
                 ;We can set up a goto instruc to call subroutines
from here
;******************************************************

'Cause it loses track of where it is. Err .. so how would you call a
Page_1 (lower half) routine from a Page_0 (upper half) main programme?

Ian

PS: It works OK if you GOTO to Page_1 (Upper) & call the subroutine
from there but you have to GOTO the same place everytime and it makes
life difficult when returning from multiple calls.

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2001\04\04@150632 by Olin Lathrop

face picon face
> org  0x00     ;PAGE 0, lower half
>
> org 0x0100    ;PAGE 0, upper half

Pages are 2K in size, which takes 11 address bits.  100h is only 256 words
into page 0.  Half way thru page 0 would be 400h.

{Quote hidden}

I don't know what page_0 or bank_0 do, but you don't need to set PCLATH
before a RETURN.  The full 13 bit address is stored on the stack.  PCLATH is
not used in performing a RETURN.

>
> org    0x0300     ;Upper half of PAGE_0
>                   ;We can set up a goto instruc to call subroutines
> from here
> ;******************************************************
>
> 'Cause it loses track of where it is. Err .. so how would you call a
> Page_1 (lower half) routine from a Page_0 (upper half) main programme?

You seem rather confused about program memory paging.  Re-read the data
sheet carefully and check the PIClist archives.  This issue seems to come up
every week or so.

In my opinion the short answer is to never manually set pages or try to
allocate particular routines to pages.  Let the linker stick the routines
where it pleases and use PAGESEL.  Take a look at my GCALL macro in
STD.INS.ASPIC at http://www.embedinc.com/pic.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, spam_OUTolinTakeThisOuTspamembedinc.com, http://www.embedinc.com

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2001\04\04@160213 by promero

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part 0 44 bytes
his is a multi-part message in MIME format.
part 1 2376 bytes content-type:text/plain; charset=us-ascii (decoded 7bit)

In fact, for the 12-bit core instruction set, pages are 512 instructions long,
for the 14-bit core instruction set , pages are 2K instructions long
and for the 16-bit core instruction set, pages ae 8K instructions long

Olin Lathrop wrote:

{Quote hidden}


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part 3 131 bytes
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2001\04\04@182632 by Bill Westfield

face picon face
> Pages are 2K in size, which takes 11 address bits.  100h is only 256 words
> into page 0.  Half way thru page 0 would be 400h.

Heh.  Told you PCLATH was a sorce of great confusion.

Note that when you're doing MATH on the PC (ie the infamous table read),
only 8 bits from the ALU ends up in the PC, so you need to worry about
256byte boundries even though CALL and GOTO instructions only need to
worry about 11bit "pages."  Furthermore, the bits of PCLATH that are
loaded into PCH in the case of GOTO/CALL are different (4:3) that those
loaded in the PCH in the case of math on the PC (4:0)

There's a nice diagram (6.2) in the "PicMicro midrange MCU Family" manual.

BillW

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2001\04\05@070630 by Ian Hynes

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face
Robert,
Thanx for that. Got to thinking about the PC & what i came up with
goes
as follows. The programme structure works on the simulator but i'm not
too sure what I did to make it right.


Bank_0 MACRO             ;Page & Bank select macros.
bcf   FSR,5
bcf   FSR,6
ENDM

Bank_1 MACRO
bsf   FSR,5
bcf   FSR,6
ENDM

Page_0 MACRO
bcf   STATUS,5
bcf   STATUS,6
ENDM

Page_1 MACRO
bsf   STATUS,5
bcf   STATUS,6
ENDM
;***********************************

       org      0x0100      ;Upper half
main    call     init        ;Initialise the ports
       movlw    ALLOFF
       movwf    PORTC       ;All electrodes in OFF state
       movlw    0x0FF
       movwf    FWD_TIME
       movwf    REV_TIME

       Page_1
       Bank_1
       call    test01        ;Call a routine in Page #1
       nop                   ;We should finish up here.
       goto    $

;****************************************************************
;PAGE #1
;****************************************************************
       org     0x0200          ;Lower half

lcdtx4   movlw    0x08
        <.. Do things but NO further calls!>   ;Careful with the nest
level
        retlw    0x00


test01   nop                    ;The routine gets data from a Page 0
register
        Page_0
        Bank_0
        movf     FWD_TIME,w    ;Load the RELAY ON time from page #0
        Page_1
        Bank_1
        movwf    charac        ;And stores it in a Page 1 reg
        call     lcdtx4        ;Then it calls another  Page 1
subroutine
        nop                    ;And returns, still wthin Page 1
          ;bcf      PCL,8      ;Programme halts here if this one is
included
        nop
        Page_0                 ;Then it flags Page 0
        Bank_0
        retlw    0x00          ;and returns there


The stuff in the data sheet about PCL,8 having to be reset in a CALL
threw a spanner in the works.

Regards - Ian

PS: just figured it out - it was the nesting level in one of the
subroutines. Tried to call subr1 from page 0, which called subr2 in
page 1, which called subr3 also in page 1. Then it tried to
return->subr2 ->subr1 -> main in page0 & no go.

OK, I've merged subr 3 into subr2 so there's only 2 nests but now
there's a lot of duplicated code since subr3 gets called twice within
subr2. How to get round *that* in the 12 bit 16C57??

***********************************************************************

Robert Rolf wrote:
{Quote hidden}

--
********************************
Ian Hynes
email : .....elekKILLspamspam.....netstra.com.au
       EraseMEian.hynesspam_OUTspamTakeThisOuTstart.com.au
URL : http://www.netstra.com.au/~elek
********************************

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2001\04\05@121957 by David Cary

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Dear Ian Hynes,

I agree that the paging mechanism on the PIC is annoying.

That's why I always use the
 BANKISEL ; Select Bank for indirect access via FSR and INDF
 BANKSEL ; Select RAM bank
 PAGESEL ; Select ROM page (for GOTO and CALL)
macros (aren't they built into your assembler ?)
rather than trying to roll my own macros.

Ian Hynes <@spam@elekKILLspamspamNETSTRA.COM.AU> on 2001-04-05 06:06:47 AM wrote:


>Bank_0 MACRO             ;Page & Bank select macros.
> bcf   FSR,5
> bcf   FSR,6
> ENDM
>
>Bank_1 MACRO
> bsf   FSR,5
> bcf   FSR,6
> ENDM

This just looks wrong to me. The FSR doesn't have any page select bits; it's
(the lo 8 bits of) a pointer. (The hi bits are set in a different register using
BANKISEL).

...
>        Page_1
>        Bank_1
>        call    test01        ;Call a routine in Page #1
>        nop                   ;We should finish up here.
>        goto    $

My assembler (MPASM) Does the Right Thing when I say
    PAGESEL test01
    call test01
.
(When I look at the ``.lst'' file, I see that PAGESEL expands to some BSF and/or
BCF instructions, similar to your macros).

{Quote hidden}

Did you know that the bits that control which bank of RAM one can access are
*different* from the bits that control which page of ROM one can GOTO ?

I would write
    BANKSEL FWD_TIME
    movf FWD_TIME,w
    BANKSEL charac
    movf charac,w
    PAGESEL lcdtx4
    call lcdtx4
which works correctly no matter where those items are located.

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David Cary

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2001\04\05@132113 by Bob Ammerman

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There has been a lot of confusion in this thread regarding the 16C57 and its
paging/banking.

It is important to note that this chip has the 12-bit core, and the
paging/banking rules are very different from the 14-bit midrange core.

Here is a summary:

Bank select bits are in FSR, not STATUS.

Page bits are in STATUS, not PCLATH.

Pages are 512 bytes.

Gotos can go anywhere in the page currently selected by the page bits in
STATUS.

Calls and computed gotos (addwf PCL,f) can only go to addresses in the first
256 bytes of the currently selected page.


Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)




{Original Message removed}

2001\04\05@144615 by uter van ooijen & floortje hanneman

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> Bank select bits are in FSR, not STATUS.
> Page bits are in STATUS, not PCLATH.
> Pages are 512 bytes.
> Gotos can go anywhere in the page currently selected by the page bits in
> STATUS.
> Calls and computed gotos (addwf PCL,f) can only go to addresses in the
first
> 256 bytes of the currently selected page.

Or just read the management summary:
If you think the paging of the 14-bit PICs is a pain in the ass you have
never looked at their little 12-bit brothers.

Wouter

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2001\04\05@152111 by David Cary

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Bob Ammerman <spamBeGoneRAMMERMANspamBeGonespamPRODIGY.NET> on 2001-04-05 12:17:47 PM
clarified things by saying:
> the 16C57
...
> It is important to note that this chip has the 12-bit core, and the
> paging/banking rules are very different from the 14-bit midrange core.
...
> Calls and computed gotos (addwf PCL,f) can only go to addresses in the first
> 256 bytes of the currently selected page.

Thanks for reminding me to put all my computed gotos and subroutines first in
the page...

...
> Bob Ammerman

Whoops, I was thinking about the 14 bit core. Sorry about the confusion.

MPASM still does the Right Thing with the instructions BANKISEL, BANKSEL, and
PAGESEL. Right ?

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2001\04\05@170700 by Olin Lathrop

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> That's why I always use the
>   BANKISEL ; Select Bank for indirect access via FSR and INDF
>   BANKSEL ; Select RAM bank
>   PAGESEL ; Select ROM page (for GOTO and CALL)
> macros (aren't they built into your assembler ?)
> rather than trying to roll my own macros.

These psedo-ops always emit the code to set the state.  With clever macros
you can keep track of what bank you are in and only emit code to switch the
bank when needed.  Sometimes you have to use these pseudo-ops because they
have access to linker information not available at assembly time.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, RemoveMEolinspamTakeThisOuTembedinc.com, http://www.embedinc.com

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