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'[PIC]: Best pullup resistor value for /MCLR pin?'
2003\12\10@121845 by Mike Hord

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Be careful with adding a cap to ground on your MCLR line.  IIRC,
the ICD2 manual discourages this practice because it can affect
the timing with which the line is brought to Vpp.

If you look in the ICD2 manual, you'll see a schematic which shows
MCLR attached to Vdd through a resistor labelled 1k-10k.  I like 10k
myself; I feel a bit better about a slightly higher resistance between
the 13V Vpp and the 5V (or less) Vdd.

Mike H.

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2003\12\10@124302 by Ken Pergola

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Mike Hord wrote:

> IIRC, the ICD2 manual discourages this practice because it can affect
> the timing with which the line is brought to Vpp.

Good point, and yup, you definitely recalled correctly Mike.

Anyone designing for ICSP should definitely read the programming specs for
the device they are using since some (not all) of the programming specs on
the PIC18F, for example, call out a *maximum* of 1 uS rise time on MCLR/VPP
to enter Program/Verify mode. Depending on the output impedance of your VPP
source, it won't take much capacitance to violate this spec.

Best regards,

Ken Pergola

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2003\12\10@132210 by llile

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This has proved to be a major headache for me on designs which won't work
without an MCLR cap.  I had a jumper to the cap that I could remove for
programming, and that worked for development.  one could also try a
resistor-cap-resistor to allow the fast risetime at the pin but still
filter transients from the power supply or from EMI.   It is not just the
ICD2 that has this problem - all of the ICSP programmers I have tried also
wheeze when a cap is connected to ground from MCLR.  FOr most development
projects you can dispense with the cap but it is handy in the real world.

-- Lawrence Lile





Ken Pergola <spam_OUTno_spamTakeThisOuTspamLOCALNET.COM>
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12/10/2003 11:41 AM
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       Subject:        Re: [PIC]: Best pullup resistor value for /MCLR pin?


Mike Hord wrote:

> IIRC, the ICD2 manual discourages this practice because it can affect
> the timing with which the line is brought to Vpp.

Good point, and yup, you definitely recalled correctly Mike.

Anyone designing for ICSP should definitely read the programming specs for
the device they are using since some (not all) of the programming specs on
the PIC18F, for example, call out a *maximum* of 1 uS rise time on
MCLR/VPP
to enter Program/Verify mode. Depending on the output impedance of your
VPP
source, it won't take much capacitance to violate this spec.

Best regards,

Ken Pergola

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2003\12\10@154851 by Wouter van Ooijen

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> Be careful with adding a cap to ground on your MCLR line.  IIRC,
> the ICD2 manual discourages this practice because it can affect
> the timing with which the line is brought to Vpp.

And there are other reasons, which have to do with the capacitor
discharging itself into the PIC when V+ is lost. This can kill the chip.
Read the datasheets.

Wouter van Ooijen

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