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'[PIC]: 16F877 Howto setup TMR0 iNTERRUPT ?'
2002\10\27@105952 by Patrick J

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I've tried to setup timer0 to overflow and generate an interrupt.
TMR0 should generate int. at 7680 Hz. From my calculations
I can get fairly close:
20MHz / 4 / prescaler 1:128 / my routine 256 = 7812 Hz provided
TMR0 is  preloaded with value 5 (error=1.7% which is ok)

The problem is that the IRQ isnt working... I think there must be something
wrong w the init. code below since it never seems to trigger the ISR.


; Setup Timer0 Interrupt with prescaler
 ; Note: dont preload the TMR0 register here. Its pointless since
 ;       this is only run once at startup. Preload should be done in ISR.

 ; setup TMR0 OPTION_register ('877 datasheet: page 48)
 ; OPTION_REG (7:0): RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0
 Bank0
 Movlw b'10000110' ; pull-ups are disabled, Interrupt on fall. edge, TMR0
source internal
    ; TMR0 source edge inc on low->high, prescaler to timer0, TMR0 rate
1:128
 movwf OPTION_REG ; and set our options in the option_reg address


 ; setup TMR0 INTCON register ('877 datasheet: page 49)
 ; INTCON (7:0): GIE PEIE T0IE INTE RBIE T0IF INTF RBIF
 Bank0
 movlw b'00100010' ; set flags for TRM0
 movwf INTCON  ;
 bsf  INTCON, GIE ; and Enable Interrupts !


(PS: formatting looks like shit... but I dare not change font since it could
possibly trigger the wrath of the ascii puritists. No names ;-)

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2002\10\27@130341 by Jason Harper

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Patrick J wrote:
>   Bank0
(snipped)
>  movwf OPTION_REG ; and set our options in the option_reg address

OPTION_REG is in bank 1...
       Jason Harper

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2002\10\28@033835 by Patrick J

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Yepp, that was it - thanxs !
/Patrick

----- Original Message -----
From: "Jason Harper"
OPTION_REG is in bank 1...
       Jason Harper

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2002\10\28@044418 by Alan B. Pearce

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>Yepp, that was it - thanxs !
>/Patrick
>
>----- Original Message -----
>From: "Jason Harper"
>OPTION_REG is in bank 1...
>        Jason Harper

A good reason to use Olin's DBANKIF macro .....


Puts banking code in only if it is needed :))))


See http://www.embedinc.com/pic/

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