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'[PIC]: 12ce519 OPTION register being masked'
2001\02\14@131011 by Mark Bishop

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This code

MOVLW   FF
OPTION

loads the OPTION register with a 0b00111111

I can't find anywhere in the Microchip docs stating that the two MSBs are
masked out.
I'm trying to set the port b pullups to disable on this chip and I've run
out of ideas.

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2001\02\14@233532 by Dwayne Reid

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At 01:08 PM 2/14/01 -0500, Mark Bishop wrote:
>This code
>
>MOVLW   FF
>OPTION
>
>loads the OPTION register with a 0b00111111
>
>I can't find anywhere in the Microchip docs stating that the two MSBs are
>masked out.
>I'm trying to set the port b pullups to disable on this chip and I've run
>out of ideas.

I'm not sure if it will help, but why not try 0xFF instead of just FF.

I was in the middle of writing a long dissertation about how that would be
the case you were trying to write the TRIS register.  But then I saw that
you quite clearly state OPTION - and I've never had a problem doing what
you are trying to do.  No other ideas - sorry.

dwayne



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2001\02\15@164619 by Peter L. Peres

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The pullups are set in the fuses word, not in the option register.

Peter

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2001\02\15@165600 by Mark Bishop

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The fuses listed in picchips are these:

Fuses: LP : 0003/0000    XT : 0003/0001
       INTRC : 0003/0002    RC : 0003/0003
       NOWDT : 0004/0000    WDT : 0004/0004
       PROTECT : 0008/0000    NOPROTECT : 0008/0008
       NOMCLR : 0010/0000    MCLR : 0010/0010


Nothing about Pullups anywhere.

-----Original Message-----
From: Peter L. Peres [EraseMEplpspam_OUTspamTakeThisOuTACTCOM.CO.IL]
Sent: Thursday, February 15, 2001 3:49 PM
To: PICLISTspamspam_OUTMITVMA.MIT.EDU
Subject: [PIC]: 12ce519 OPTION register being masked


The pullups are set in the fuses word, not in the option register.

Peter

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2001\02\16@180040 by Peter L. Peres

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>The fuses listed in picchips are these:
>
>Fuses: LP : 0003/0000    XT : 0003/0001
>        INTRC : 0003/0002    RC : 0003/0003
>        NOWDT : 0004/0000    WDT : 0004/0004
>        PROTECT : 0008/0000    NOPROTECT : 0008/0008
>        NOMCLR : 0010/0000    MCLR : 0010/0010
>
>
>Nothing about Pullups anywhere.

I am sorry, you are right! I have misplaced the 12C5xx pdf files so I do
not have this info. I have the generic 12C5xx pdf and it says that the
/GPPU is OPTION.6 . Probably the name that is different from 16Fxxx
terminology confused you ?

Peter

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2001\02\16@181047 by Mark Bishop

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Yes, the Pullups are OPTION.6  Load a 1 into that bit position does nothing.
When steping through the code a 0 is reported at OPTION.6

(Note: Loading a 0 into OPTION.6 also loads a 0 - not inverse as I hoped)

{Original Message removed}

2001\02\17@060938 by Peter L. Peres

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Obviously you need to load a 0 to turn on the pullups since the bit name
is /GPPU. I am not sure about what you mean with 'stepping through the
code'. Try to program a part with a test program that does something like:

loop:
 set OPTION.6 = 1
 set GP.0 = OPTION.6
 set OPTION.6 = 0
 set GP.0 = OPTION.6
 goto loop

And put a scope on GP.0. The simulators and debuggers sometimes have fits
with hardware-related bits afaik ;-)

Peter

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