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'[PIC]: 12Fxxx programming'
2002\10\21@020201 by Tony Nixon2

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Hi all,

I hope Microchip got it right.


In all PICs I have seen with regards to programming, MCLR is raised to
VPP after raising VCC. In the data sheet for the 12F675 it mentions to
raise MCLR to VPP 'before' raising VCC.

I have noted in earlier PICs about applying high voltages to MCLR before
power is applied and damaging the pin.

Anyone have some more insight?


Best regards

Tony

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2002\10\21@071710 by =?iso-8859-1?Q?F=E1bio_Pereira?=

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Hi Tony,

I think that is only a doc bug ...  I have built a small programmer (my
design, for programming 18F devices some months ago) and I used this device
to help with 12F, without prob.

I think IC-PROG is using the same algorithm too ...

Fabio

{Original Message removed}

2002\10\21@074202 by Olin Lathrop

face picon face
> In all PICs I have seen with regards to programming, MCLR is raised to
> VPP after raising VCC. In the data sheet for the 12F675 it mentions to
> raise MCLR to VPP 'before' raising VCC.
>
> I have noted in earlier PICs about applying high voltages to MCLR before
> power is applied and damaging the pin.

Different families require a different order of Vpp versus Vdd.

I have a generic routine that tries to figure out what kind of PIC is in the
socket.  It first tries Vpp before Vdd and tries to read the ID word.  If
that doesn't seem to work it tries Vdd before Vpp, etc.  Part of the
configuration data that is part of the programming software for each PIC
indicates which Vpp,Vdd order it needs.


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2002\10\21@121749 by Wouter van Ooijen

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> In all PICs I have seen with regards to programming, MCLR is raised to
> VPP after raising VCC. In the data sheet for the 12F675 it mentions to
> raise MCLR to VPP 'before' raising VCC.

I overlooked that funny detail, used the 'useuall' procedure and I am
programming 12F675's just fine. That's of course no proof that this is
correct, but it is something...

Wouter van Ooijen

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2002\10\21@140324 by Peter L. Peres
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On the 12C and other 8 pin devices with internal clock the MCLR should
rise very fast to Vpp to prevent the chip from starting program execution.

Peter

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2002\10\21@183113 by Olin Lathrop

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> I overlooked that funny detail, used the 'useuall' procedure and I am
> programming 12F675's just fine. That's of course no proof that this is
> correct, but it is something...

I don't remember exactly which chip it was, but I do remember that the
Vpp/Vdd order mattered for it.  One of the symptoms was that the ID word
would sometimes come back all zero.  I experimented enough to see positive
evidence that the Vpp/Vdd order can be important.


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2002\10\22@021057 by Wouter van Ooijen

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> I don't remember exactly which chip it was, but I do remember that the
> Vpp/Vdd order mattered for it.  One of the symptoms was that
> the ID word
> would sometimes come back all zero.  I experimented enough to
> see positive
> evidence that the Vpp/Vdd order can be important.

Do you recall whether this applied to a flash or EPROM/OTP PIC?

Wouter van Ooijen

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2002\10\22@185033 by Tony Nixon2

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Wouter van Ooijen wrote:
>
> > I don't remember exactly which chip it was, but I do remember that the
> > Vpp/Vdd order mattered for it.  One of the symptoms was that
> > the ID word
> > would sometimes come back all zero.  I experimented enough to
> > see positive
> > evidence that the Vpp/Vdd order can be important.
>
> Do you recall whether this applied to a flash or EPROM/OTP PIC?
>
> Wouter van Ooijen


Looking through a lot of data sheets, most series don't actually specify
whether VCC is raised before VPP or the other way around.

From what I can see....


Not mentioned, but assuming VCC before VPP

16Cxxx, 12c50x, 12C67x, 16F818/819, 16F87/88, 16F7x, 16F8x, 16F87x,
16F87xA, 18Cxxx,


VPP before VCC

12F675, 16F62xA, 16F630/676, 16C7xx


VCC before VPP

all 18Fxxxx,

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2002\10\22@191943 by Wouter van Ooijen

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> VPP before VCC
> 12F675, 16F62xA, 16F630/676, 16C7xx

Funny, or actually not funny, for me.

Now for the other question: has enyone actually seen a (flash) PIC that
could not be programmed by applying Vcc first and then rising Vpp? The
12F675s and 12F629s that I can *can* be programmed this way.

Wouter van Ooijen

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2002\10\22@193713 by Tony Nixon

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Wouter van Ooijen wrote:
>
> > VPP before VCC
> > 12F675, 16F62xA, 16F630/676, 16C7xx
>
> Funny, or actually not funny, for me.
>
> Now for the other question: has enyone actually seen a (flash) PIC that
> could not be programmed by applying Vcc first and then rising Vpp? The
> 12F675s and 12F629s that I can *can* be programmed this way.
>
> Wouter van Ooijen

I should be getting some 12F675's today to try out.

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2002\10\23@081644 by Olin Lathrop

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part 1 2105 bytes content-type:text/plain; (decoded 7bit)

> > VPP before VCC
> > 12F675, 16F62xA, 16F630/676, 16C7xx
>
> Funny, or actually not funny, for me.
>
> Now for the other question: has enyone actually seen a (flash) PIC that
> could not be programmed by applying Vcc first and then rising Vpp? The
> 12F675s and 12F629s that I can *can* be programmed this way.

This is now my third attempt to respond to this thread.  The first time I
attached too much source code and it got bounced back by the list server
because of the 1000 line limit.  The second time must have been under that
limit, but I haven't seen that message come back over 12 hours later.  I
have received other message back that I have sent since then, so I have no
idea what happened.

Anyway, I have found that some of the 16F87x family (I think I was testing
with a 16F876 at the time) reacts in a flaky way when Vpp is applied before
Vdd.  Sometimes it does not respond at all.  This is determined by it not
driving the data line when expected.  Other times it drives the data line
but the ID word is all 0.  The attached file is the host souce code for the
module that determines what type of PIC is in the socket.  It first tries
the Vpp before Vdd method.  If that is inconclusive it tries Vdd before Vpp.
No matter how it gets the ID, the Vpp/Vdd reset method is later set for that
specific ID in a different module.

I think you are asking whether you can get away with always using Vdd before
Vpp.  This sounds like a very bad idea to me.  As an example, look at the
16F62x programming specification (DS30034D).  See Figure 2-2 on page 5.
Microchip is being very clear about Vpp required before Vdd to the extent of
specifying that Vpp must be high 5uS before Vdd is raised, then another 5uS
is required before you are allowed to do the serial communication.

I am not sure I ever saw a failure using Vdd before Vpp with a chip that
wanted it the other way around.  There might have been something with a
16F628, but don't remember for sure.  Once my auto-ID code was working this
issue didn't come up anymore.


part 2 9795 bytes content-type:application/octet-stream; (decode)

part 3 279 bytes

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2002\10\23@145708 by Wouter van Ooijen

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> I think you are asking whether you can get away with always
> using Vdd before Vpp.  This sounds like a very bad idea to me.

I agree that it is contray to the 12Fxxx programming spec. But I would
ill be interested in experience where it actually failed.

Wouter van Ooijen

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2002\10\23@155620 by Olin Lathrop

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> > I think you are asking whether you can get away with always
> > using Vdd before Vpp.  This sounds like a very bad idea to me.
>
> I agree that it is contray to the 12Fxxx programming spec. But I would
> ill be interested in experience where it actually failed.

OK, I stuck a 16F628 into my programmer and used a test program that allows
low level operations.  I couldn't get anything to fail regardless of which
reset algorithm (Vpp before Vdd or Vdd before Vpp) I selected.  Of course
this doesn't prove anything except that you can get away with it some of the
time.  That's probably worse than outright failing all the time.


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2002\10\27@164316 by Tony Nixon

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More thoughts on the VPP before VCC issue, perhaps it is because the
MCLR input can be programmed and used as a normal IO pin. Maybe that
causes problems with the normal programming process.

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2002\10\27@164734 by Andy Kunz

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At 08:41 AM 10/28/02 +1100, you wrote:
>More thoughts on the VPP before VCC issue, perhaps it is because the
>MCLR input can be programmed and used as a normal IO pin. Maybe that
>causes problems with the normal programming process.

Yes, that's exactly the reason.

You can also read up on it in the Tech Tools write-up on the QuickWriter.

Andy

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2002\10\28@004301 by Wouter van Ooijen

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> More thoughts on the VPP before VCC issue, perhaps it is because the
> MCLR input can be programmed and used as a normal IO pin. Maybe that
> causes problems with the normal programming process.

How about the 16F628, which has the same option?

Wouter van Ooijen

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2002\10\28@005956 by Tony Nixon

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Wouter van Ooijen wrote:
>
> > More thoughts on the VPP before VCC issue, perhaps it is because the
> > MCLR input can be programmed and used as a normal IO pin. Maybe that
> > causes problems with the normal programming process.
>
> How about the 16F628, which has the same option?
>
> Wouter van Ooijen

Same thing. MCLR can be programmed as an IO pin.

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2002\10\28@122429 by Dwayne Reid

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At 04:58 PM 10/28/02 +1100, Tony Nixon wrote:

>Same thing. MCLR can be programmed as an IO pin.

Make that: MCLR can be programmed as an INPUT pin.  As far as I can tell,
MCLR *cannot* be an output.

dwayne

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2002\10\28@154005 by Wouter van Ooijen

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> You can also read up on it in the Tech Tools write-up on the
> QuickWriter.

URL?

Wouter van Ooijen

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2002\10\28@154012 by Wouter van Ooijen

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(about 16f628)

> >Same thing. MCLR can be programmed as an IO pin.
>
> Make that: MCLR can be programmed as an INPUT pin.  As far as
> I can tell, MCLR *cannot* be an output.

Correct. I recall asking (IIRC to uChip) how /MCLR could be both an IO
pin and HVP enable. The response was: not IO, only *I*, so no conflict.
Note that DS30034B (older 16f62x programming spec, current is -D) does
*not* contain the MCLR-before-power requirement!

Now how is a programmer going to indentify an unknown (flash) chip? Is
it always allowed to Vcc-before-Vpp? Or is it always allowed to
Vpp-before-Vcc?

Wouter van Ooijen

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2002\10\28@165512 by Tony Nixon

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Wouter van Ooijen wrote:
>
> (about 16f628)
>
> > >Same thing. MCLR can be programmed as an IO pin.
> >
> > Make that: MCLR can be programmed as an INPUT pin.  As far as
> > I can tell, MCLR *cannot* be an output.
>
> Correct. I recall asking (IIRC to uChip) how /MCLR could be both an IO
> pin and HVP enable. The response was: not IO, only *I*, so no conflict.
> Note that DS30034B (older 16f62x programming spec, current is -D) does
> *not* contain the MCLR-before-power requirement!
>
> Now how is a programmer going to indentify an unknown (flash) chip? Is
> it always allowed to Vcc-before-Vpp? Or is it always allowed to
> Vpp-before-Vcc?

Hi Wouter,

I have DS30034D

I tried both ways with a 675 chip yesterday and both worked and can
identify.

I still have to program the chip so that MCLR is a digital function and
try that mode.

It appears that my data sheet 40300B states that the MCLR pin is
input/output when programmed as a digital pin. Even the port RA5
schematic supports this.

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2002\10\28@170728 by Tony Nixon

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Another snippet from an errata document DS80073 is that MCLR is enabled
when in LVP mode regardless of the config register setting.

Just looking in the 16F62x-A interim data sheet that it has a 28 pin ICD
version as well, 16F62xA-ICD

Looks like it has extra dedicated pins set aside for ICD purposes.

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2002\10\28@170936 by Tony Nixon

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Tony Nixon wrote:

> It appears that my data sheet 40300B states that the MCLR pin is
> input/output when programmed as a digital pin. Even the port RA5
> schematic supports this.

Sorry, I was looking at the 16F62x sheet.

You are right, the 675 MCLR pin is input only.

My appologies.

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2002\10\29@023827 by Wouter van Ooijen

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> It appears that my data sheet 40300B states that the MCLR pin is
> input/output when programmed as a digital pin. Even the port RA5
> schematic supports this.

I expect problems will arise when you configure the MCLR pin as an
output *and* the program makes it low. In that case rising /MCLR to Vpp
after Vcc will sult in an interesting battle between the Vpp source and
the PIC's sink FET. At least in my programmer the FET will win, but with
a progammer that can support EPROM PICs...

Wouter van Ooijen

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2002\10\29@090103 by Wouter van Ooijen

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> > It appears that my data sheet 40300B states that the MCLR pin is
> > input/output when programmed as a digital pin. Even the port RA5
> > schematic supports this.
>
> Sorry, I was looking at the 16F62x sheet.

Now tell me, where were you looking? 40300B (16f62x) shows RA5 as input
only, and BTW, so does the 12fxxx datasheet.

But now for the fun: a customer complained that my Wisp628 refused to
program his 12f chips. I could reproduce the problem when I configure
RA5-MCLR for IO (in the fuses) and made it output and low (in the
program). Yet RA5 can not be used as output (and verify: no, I can't
blink a LED on it)! The problem disappears when I use the Vpp-before-Vcc
sequence....

Wouter van Ooijen

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2002\10\29@131528 by Peter L. Peres

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On Tue, 29 Oct 2002, Wouter van Ooijen wrote:

*>> It appears that my data sheet 40300B states that the MCLR pin is
*>> input/output when programmed as a digital pin. Even the port RA5
*>> schematic supports this.
*>
*>I expect problems will arise when you configure the MCLR pin as an
*>output *and* the program makes it low. In that case rising /MCLR to Vpp
*>after Vcc will sult in an interesting battle between the Vpp source and
*>the PIC's sink FET. At least in my programmer the FET will win, but with
*>a progammer that can support EPROM PICs...

The programming spec says 40 or 100mA current limit on Vpp (or lower). The
POR timer will delay the start of the program by enough microseconds to
enable the programmer to rise the Vpp if the programmer is built to specs.

I think that the parts that require Vpp before Vdd are those that allow
the POR timer to be disabled.

Peter

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2002\10\29@163601 by Tony Nixon

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Wouter van Ooijen wrote:
>
> > > It appears that my data sheet 40300B states that the MCLR pin is
> > > input/output when programmed as a digital pin. Even the port RA5
> > > schematic supports this.
> >
> > Sorry, I was looking at the 16F62x sheet.
>
> Now tell me, where were you looking? 40300B (16f62x) shows RA5 as input
> only, and BTW, so does the 12fxxx datasheet.

I attached a GIF of the data sheet for RA5 from my copy of 40300B. It
clearly shows the output driver, although section 5.1 states that RA5 is
a schmitt trigger input only. Go figure.

> But now for the fun: a customer complained that my Wisp628 refused to
> program his 12f chips. I could reproduce the problem when I configure
> RA5-MCLR for IO (in the fuses) and made it output and low (in the
> program). Yet RA5 can not be used as output (and verify: no, I can't
> blink a LED on it)! The problem disappears when I use the Vpp-before-Vcc
> sequence....

I tried programming the 12F using both power up methods and with MCLR
enabled and disabled and it programmed everytime.


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2002\10\30@143342 by Dwayne Reid

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At 08:36 AM 10/29/02 +0100, Wouter van Ooijen wrote:
> > It appears that my data sheet 40300B states that the MCLR pin is
> > input/output when programmed as a digital pin. Even the port RA5
> > schematic supports this.
>
>I expect problems will arise when you configure the MCLR pin as an
>output *and* the program makes it low. In that case rising /MCLR to Vpp

After taking a close look at the data sheet for the 16f62x family, I sent
an email to tech support at Microchip and they indeed confirm that Figure
5-5 on DS40300B page 30 of the data sheet is wrong.  Here is their reply to me:

<start of copy>

Sender: spamBeGoneJoseph.Julicher@spam@spamspam_OUTmicrochip.com
Date: Wed, 30 Oct 2002 08:57:33 -0700

The datasheet is in error.
RA5 is input only.
RA5 has only 1 clamping diode and it is between RA5 and Vss.
A revised datasheet that will correct this error and others is nearing
completion.

<end of copy>

Hope this helps!

dwayne

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2002\10\30@145345 by Bob Blick

face picon face
> A revised datasheet that will correct this error and others is nearing
                                                             ^^

Other typos is also nearing completion :)

-Bob

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2002\10\30@150352 by Olin Lathrop

face picon face
> Now how is a programmer going to indentify an unknown (flash) chip? Is
> it always allowed to Vcc-before-Vpp? Or is it always allowed to
> Vpp-before-Vcc?

The code I posted last week tries both methods if necessary to get the
device ID.  Once the ID is available, regardless of how it was determined,
the particulars for that chip including the Vpp/Vcc method are looked up
in a host file.  This algorithm has been tested and seems to work for
12F6xx, 16F6xx, 16F87x, 18Fxx2, and 18Fxx8.


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2002\10\30@151803 by Olin Lathrop

face picon face
> I expect problems will arise when you configure the MCLR pin as an
> output *and* the program makes it low.

I don't believe that is possible.  As far as I know (and if you think
about how Microchip would have to design it) MCLR is never an output on
any PIC.


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2002\10\30@151804 by Wouter van Ooijen

face picon face
> > Now how is a programmer going to indentify an unknown
> (flash) chip? Is
> > it always allowed to Vcc-before-Vpp? Or is it always allowed to
> > Vpp-before-Vcc?
>
> The code I posted last week tries both methods if necessary to get the
> device ID.  Once the ID is available, regardless of how it
> was determined,
> the particulars for that chip including the Vpp/Vcc method
> are looked up
> in a host file.  This algorithm has been tested and seems to work for
> 12F6xx, 16F6xx, 16F87x, 18Fxx2, and 18Fxx8.

And of course there are the two very different protocols for the 14-bit
and the 16-bit cores....

Did you find instances where Vpp-before-Vcc did *not* put the chip in
programming mode?

Wouter van Ooijen

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2002\10\30@152547 by Dave Tweed

face
flavicon
face
Bob Blick <bblickEraseMEspamSONIC.NET> wrote:
> > A revised datasheet that will correct this error and others is nearing
>                                                               ^^
> Other typos is also nearing completion :)

The subject of the original sentence is "datasheet", which agrees in number
with the verb "is". The phrase "that will correct this error and others" is
a subordinate clause that describes the datasheet.

Better stick with engineering -- don't try to get a job teaching English.

-- Dave Tweed

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2002\10\30@153300 by Bob Blick

face picon face
> Better stick with engineering -- don't try to get a job teaching English.

I taught for many years, and blame all my bad habits and shortcomings on
long-term exposure to students :)

-Bob

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2002\10\30@171018 by Olin Lathrop

face picon face
> Did you find instances where Vpp-before-Vcc did *not* put the chip in
> programming mode?

We went over this last week.  I did find problems with the 16F87x series
acting flaky when the wrong Vpp/Vdd strategy was used.  I don't remember
off the top of my head which is which.


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2002\10\31@222521 by PICLIST

flavicon
face
> > Did you find instances where Vpp-before-Vcc did *not* put the chip
in
> > programming mode?
>
> We went over this last week.  I did find problems with the 16F87x
series
> acting flaky when the wrong Vpp/Vdd strategy was used.  I don't
remember
> off the top of my head which is which.

I am currently trying to fix some programming issues with the Wisp628
and a
16F877A.  I wonder if this is the issue, since I do not believe that Vcc
is applied after Vpp.  Vpp appears to be applied even after Vcc has been
active; the PIC was running a sample "blink LED" program before Vpp was
applied.

Brian Smith

P.S. Please send me private e-mail if my mail format is incorrect.  I am
using Outlook (not express), but I don't want to clutter the list with
yet another discussion of mail formats.

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'[PIC]: 12Fxxx programming'
2002\11\01@154818 by Wouter van Ooijen
face picon face
> I am currently trying to fix some programming issues with the Wisp628
> and a 16F877A.

If you have trouble contact me, the 16F87xA's should program OK (no
/MCLR that can be used for I/O, no Vpp-before-Vcc mentioned in the
specs).

Wouter van Ooijen

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2002\11\02@005932 by PICLIST

flavicon
face
> > I am currently trying to fix some programming issues with the
Wisp628
> > and a 16F877A.
>
> If you have trouble contact me, the 16F87xA's should program OK (no
> /MCLR that can be used for I/O, no Vpp-before-Vcc mentioned in the
> specs).

Wouter is correct, as usual.  The problems had nothing to do with Vpp
before Vcc, but with a cold solder joint.  I was speculating that it
might be, because of the question raised about the order of Vpp versus
Vcc.

Lesson learned: read the datasheet first!  The programming algorithm
specifically states that Vpp is raised AFTER Vcc (although it MCLR must
rise from 5VDC to 13VDC in less than 72 clocks).

By the way, if anyone new to PIC programming is reading, the Wisp628
programmer is extremely easy and cost effective as a prototype
programmer.  I have yet to see anyone produce a kit with such detailed
instructions and pictures.

Brian Smith

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