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'[PIC:] Reading PortA on 16F877Re:[PIC:] Reading Po'
2004\02\13@135933 by Intosh, Ph.D.

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source= http://www.piclist.com/piclist/2004/02/13/032504b.txt?

Jan-Erik Soderholm  says:
>And, I think this thread started with a builtin macro in MPASM, didn't it ?


I have two questions on the built-in macros.

banksel
 Does banksel always generate two instructions on the 16F877?  Is there a
clever way have a macro generate only the minimum number of
instructions?  I have thought of a design that compiles the .lkr file into
an include file that cooperates with the macros, but I haven't gone
anywhere with it.

pagesel
 Pagesel did not work in my environment.  I ended up putting in the
sequence that it is supposed to emit.  Does anyone else see this?
 movlw high Target
 movwf PCLATH

- ---
Aubrey  McIntosh
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2004\02\13@141011 by Jan-Erik Soderholm

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Aubrey McIntosh, Ph.D. wrote :

> Does banksel always generate two instructions on the
> 16F877?

I think so. I'd guess (if MPASM is smart enough)
one instruction on two page PICs and two instructions
on four page PICs.

> Is there a
> clever way have a macro generate only the minimum number of
> instructions?

Yes, Olins DBANKIF macros does that. Note that you must have a
system of assembler symbols to keep track of the current
bank settings, and in some cases you can't now what the
settings are (such as after an "entry point"). That's where Olins
macro UNBANK comes into play. UNBANK removes all
assumptions of bank settings so the next DBANKIF always
creates the bcf/bsf instructions.

>  I have thought of a design that compiles the
> .lkr file into
> an include file that cooperates with the macros, but I haven't gone
> anywhere with it.

You must also have a list of all FSR with information on which
FSR goes into which bank, I think.

One idea could be to download Olins environmet and learn from
his work :-)

(Don't know about PAGESEL...)

Jan-Erik.

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2004\02\13@141425 by Olin Lathrop

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Aubrey McIntosh, Ph.D. wrote:
> banksel
>   Does banksel always generate two instructions on the 16F877?

Yes.

> Is there a clever way have a macro generate only the
> minimum number of instructions?

Yes.  See the DBANKIF macro in STD.INS.ASPIC at http://www.embedinc.com.

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2004\02\13@142014 by Jan-Erik Soderholm

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Another thing about BANKSEL/DBANKIF...

One nice thing with Olins DBANKIF, is that you can
just leave them in place when moving code from
the 16 to the 18 series PICs, they will just never
generate any code, since all FSR's are in the same
bank anyway. Easier to write portable code...

Now, it *might* be that BANKSEL also works like
that, I don't know...

Jan-Erik.

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2004\02\13@170036 by Eric Christensen

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On Fri, 13 Feb 2004 20:09:25 +0100
Jan-Erik Soderholm <spam_OUTjan-erik.soderholmTakeThisOuTspamTELIA.COM> wrote:

{Quote hidden}

Couldn't inclusive-or be used instead of 1 or 2 bcf/bsf instructions?  That way
the macro would insert either 1 or 0 instructions.

Eric

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2004\02\13@170659 by Andrew Warren

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Eric Christensen <.....PICLISTKILLspamspam@spam@mitvma.mit.edu> wrote:

> Couldn't inclusive-or be used instead of 1 or 2 bcf/bsf
> instructions? That way the macro would insert either 1 or 0
> instructions.

   Yes, you could use inclusive-or IF:

   1.  You were only setting bits, never clearing them, and
   2.  You didn't care that W and the Status bits got screwed up.

   -Andy

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2004\02\13@171322 by Andrew Warren

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Andrew Warren <.....PICLISTKILLspamspam.....mitvma.mit.edu> wrote:

> 1.  You were only setting bits, never clearing them, and
> 2.  You didn't care that W and the Status bits got screwed up.

   Oh, and inclusive-or takes two instructions, anyway.

   -Andy

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2004\02\13@174642 by Eric Christensen

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Oops, yeah...  didn't think that one through completely.

Eric

On Fri, 13 Feb 2004 14:12:31 -0800
Andrew Warren <aiwspamspam_OUTCYPRESS.COM> wrote:

{Quote hidden}

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2004\02\13@174852 by Eric Christensen

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It does?  Please explain.

Eric

On Fri, 13 Feb 2004 14:18:35 -0800
Andrew Warren <RemoveMEaiwTakeThisOuTspamCYPRESS.COM> wrote:

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2004\02\13@175306 by Eric Christensen

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I guess one to load W and another for the iorwf, but...  The actual iorwf is a
single cycle instruction according to the 16F876 and 18F458 datasheets.

Eric


On Fri, 13 Feb 2004 16:44:19 -0600
Eric Christensen <RemoveMEsunkistspamTakeThisOuTiastate.edu> wrote:

{Quote hidden}

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2004\02\13@185404 by Olin Lathrop

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Eric Christensen wrote:
> Couldn't inclusive-or be used instead of 1 or 2 bcf/bsf instructions?
> That way the macro would insert either 1 or 0 instructions.

No, for several reasons.  First you can't OR a literal and a register in one
instruction, so a minimum of two would be required anyway.  Second, an OR
modifies the Z flag whereas BCF and BSF do not.


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2004\02\13@185612 by Olin Lathrop

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Eric Christensen wrote:
> It does?  Please explain.

    movlw   <bit mask>
    iorwf   status

As Andy noted, this trashes W, Z, and is only useful for setting banks bits
to 1.  All in all, not a good method.


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2004\02\13@195958 by Andrew Warren

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Eric Christensen <RemoveMEPICLISTspam_OUTspamKILLspammitvma.mit.edu> wrote:

> I guess one to load W and another for the iorwf, but...  The
> actual iorwf is a single cycle instruction according to the 16F876
> and 18F458 datasheets.

   Yes.  IORWF is one cycle, but the necessary MOVLW takes another.

   -Andy

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