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Thread
'[PIC:] LCD & KS0066 - Another goofy prob?'
2003\11\05@134604
by
1zlx0fc02
|
Hi:
That BGMicro thread was pretty timely had I aquired one, but I got a 16x2 LCD from
http://www.timeline-inc.com. Yes, next time I'll pay a few more bucks for a different
module, most likely. The photocopied spec sheet they sent (only the 1st page - they
can't e-mail them, either and only ship once per week) is for the Hitachi LM052L
module. The module itself sports the number KP-03. I've got the operating
instructions for the Seiko modules off the net as well as the HD44780U spec. sheet.
But as I said, I've got a KS0066 controller with the KS0065 chip ( a driver? )
After looking at the numerous C and asm code examples mostly from PIClist, I came
up with the code posted below. My problem is different from that of the poster with
the module from BGMicro.
At this point, I've just used a pot between +5V Vdd and Vss for the contrast. I've got
the first row of 16 chars blacked out since it still thinks it's a 1 row module. When I
turn the contrast up towards Vdd, the dots get lighter. Very dark at 0V.
I'm using 4 bit mode and the lower bits of the module are floating high. I figure that's
ok because bit 1 and 0 of the upper nibble is what sets the data length regardless of
the states of the lower nibble. I'll ground those other lines though, since that's really
the right thing to do.
It appears that this module isn't getting it's instructions. I'd have been real happy if
the thing went blank like it did for the guy with the BGMicro module. At least then I'd
know something was happening and could think about using a negative contrast
voltage, which may not even be needed for my module.
I'm using a 16F628A. My CLKOUT pin is reading 1.5MHz so the internal osc is
running at 6MHz. I degubbed the code to stop after the data length setting and
verified that the upper nibble of the module is getting 0x2 for 4 bit mode. I also
degubbed up this point in my main code module:
call LCD_init
movlw 0x41 ; 'A'
call LCD_putc
That's all the main code module does. LCD_init sets up 4-bit xfer, 16x2, 5x7
At this point, I verified that the lower nibble of the letter "A" was present on PORTA
RA3-RA0.
The delay macros (from that generator cgi page at PIClist) were written for 4Mhz
osc, so I threw in enough delay for module POR in the LCD_init function to account
for the faster speed.
I notice the LCD timing diagram calls for Data setup prior to E going high. All the
code examples I've studied don't do this. The timing diagram shows E going low in
the middle of a valid data frame. I think "E" should be called "/E". I'm setting up the
data and strobing the E line high, then low, just like everyone else.
Here's that LCD code. I hope it is readable. It came out of UltraEdit. You should see
an extra \t (TAB) in a couple of comments.
Maybe someone can help figure out what's wrong. I'm out of ideas. It took 3-weeks
to get this LCD and I'm not enthused about paying return postage and looking for the
credit to my Visa account.
Thanks in advance,
Mike
radix dec
INCLUDE "p16f628a.inc"
INCLUDE "dlymacro.inc"
errorlevel 0, -302
; Pindefs
#DEFINE LCD_D7 PORTA, 3
#DEFINE LCD_D6 PORTA, 2
#DEFINE LCD_D5 PORTA, 1
#DEFINE LCD_D4 PORTA, 0
#DEFINE LCD_RS PORTB, 2 ; RB2 to LCD pin 4
#DEFINE LCD_E PORTB, 1 ; RB1 to LCD pin 6
.lcdreg UDATA
lcd_temp res 1
.lcd_module CODE
global LCD_init
global LCD_putc
; Initialize the LCD
; Hitachi POR sequence:
; LCD POR
; Display Clear
; Function set
; Disp on/off
; Entry mode
LCD_init
clrf PORTA
bcf LCD_RS
bcf LCD_E
call Delay_10ms
call Delay_10ms
call Delay_10ms
call Delay_10ms
call Delay_10ms
call Delay_10ms
call Delay_10ms
call Delay_10ms
; Function set executed first to set interface data length
bsf PORTA, 1 ; 0x2 sets 4-bit xfer mode - DL=0
; high bits xfer'd first
call Strobe
movlw b'00101000' ; 4 bit xfer, 2 lines, 5x7 dot matrix
call LCD_CMD
movlw b'00101000' ; 4 bit xfer, 2 lines, 5x7 dot matrix
call LCD_CMD
call LCD_Off
call LCD_CLR
call LCD_Mode
call LCD_On
return
Strobe
bsf LCD_E
goto $+1
bcf LCD_E
call Delay_10ms ; plenty of time or too much
; between nibbles?
return
LCD_CMD
bcf LCD_RS
BANKSEL lcd_temp
movwf lcd_temp
swapf lcd_temp, w ; high bits in low nibble
BANKSEL 0
andlw 0x0f ; mask out upper nibble
movwf PORTA ; put data on line
call Strobe
BANKSEL lcd_temp
movf lcd_temp, w
BANKSEL 0
andlw 0x0f ; mask out upper nibble
movwf PORTA ; put data on line
call Strobe
return
LCD_Off
movlw b'00001000'
call LCD_CMD
return
LCD_On
movlw b'00001111' ; Disp on, Cur on, Blink on
call LCD_CMD
return
LCD_CLR
movlw 0x01
call LCD_CMD
return
LCD_Mode
movlw b'00000110' ;incr cur, no disp shift
call LCD_CMD
return
LCD_putc
bsf LCD_RS
BANKSEL lcd_temp
movwf lcd_temp
swapf lcd_temp, w ; high bits in low nibble
BANKSEL 0
andlw 0x0f ; mask out upper nibble
movwf PORTA ; put data on line
call Strobe
BANKSEL lcd_temp
movf lcd_temp, w
BANKSEL 0
andlw 0x0f
movwf PORTA
call Strobe
bcf LCD_RS
return
Dly_10ms ; expand macro
END
Here's the delay code in case anyone cares. It's the function from the cgi page
modified into a macro, etc.
Dly_10ms macro
; Delay = 0.01 seconds
; Clock frequency = 4 MHz
; Actual delay = 0.01 seconds = 10000 cycles
; Error = 0 %
FIXED_REGISTERS UDATA
local d1, d2
d1 res 1
d2 res 1
.dly10ms CODE
Delay_10ms
;9993 cycles
movlw 0xCE
BANKSEL d1 ; extra cycles
movwf d1
movlw 0x08
movwf d2
Delay_10ms_0
decfsz d1, f
goto $+2
decfsz d2, f
goto Delay_10ms_0
;3 cycles
goto $+1
nop
BANKSEL 0 ; extra cycles
return ; 4 cycles (including call)
endm
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2003\11\05@164450
by
John Tserkezis
|
1zlx0fc02@SNEAKEMAIL.COM wrote:
> It appears that this module isn't getting it's instructions. I'd have been real happy if
> the thing went blank like it did for the guy with the BGMicro module. At least then I'd
> know something was happening and could think about using a negative contrast
> voltage, which may not even be needed for my module.
I had a gotcha that got me some time back. The contrast setting is different
between one and two line mode, when being used on a two line display.
I had existing working code for a one line display, and managed to get that
working first, then changed to four bit mode, and two line mode at the same
time before testing again.
Spent the next two days trying to work out what went wrong around the four
bit conversion, before I realised I had it right all along.
All I had to do was tweak the contrast pot a bit.
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2003\11\05@233440
by
piclist
|
On 6 Nov 2003 at 8:31, John Tserkezis jt-at-TECHNICI wrote:
> .....1zlx0fc02KILLspam
@spam@SNEAKEMAIL.COM wrote:
>
> > It appears that this module isn't getting it's instructions. I'd have been real happy if
> > the thing went blank like it did for the guy with the BGMicro module. At least then I'd
> > know something was happening and could think about using a negative contrast
> > voltage, which may not even be needed for my module.
>
> I had a gotcha that got me some time back. The contrast setting is different
> between one and two line mode, when being used on a two line display.
>
> I had existing working code for a one line display, and managed to get that
> working first, then changed to four bit mode, and two line mode at the same
> time before testing again.
>
> Spent the next two days trying to work out what went wrong around the four
> bit conversion, before I realised I had it right all along.
>
> All I had to do was tweak the contrast pot a bit.
>
Not a bad idea. It took a while to get some extra pins and tweak the code, but I
lashed up an 8 bit xfer circuit. I'm seeing 'A' at the LCD D7-D0, but no joy :(
For a second I thought I saw 'A', so I wrote code to follow it with 'a' and 'L' - nope.
Interesting trivia thing though. With the contrast set down near 0V, the 1st row is
black dots and the 2nd row shows up lighter than the background. As the contrast V
goes up and the black begins to match the background, the 2nd row approaches the
same color of the background. At higher voltages, the 1st row becomes lighter than
the background, while the 2nd row matches the background exactly.
Hmm... gotta figure out what to try next.
Regards,
Mike
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2003\11\06@035805
by
Hulatt, Jon
|
> -----Original Message-----
> From: 1zlx0fc02
KILLspamSNEAKEMAIL.COM [.....1zlx0fc02KILLspam
.....SNEAKEMAIL.COM]
> Sent: 05 November 2003 18:36
> To: EraseMEPICLISTspam_OUT
TakeThisOuTMITVMA.MIT.EDU
> Subject: [PIC:] LCD & KS0066 - Another goofy prob?
>
>
> At this point, I've just used a pot between +5V Vdd and Vss
> for the contrast. I've got the first row of 16 chars blacked
> out since it still thinks it's a 1 row module. When I turn
> the contrast up towards Vdd, the dots get lighter. Very dark at 0V.
>
The "Default" internal initialisation of a two line LCD will result in
exactly what you're seeing here. Set your contrast so that one line looks
black, and one line looks clear, and leave it at that.
> I'm using 4 bit mode and the lower bits of the module are
> floating high. I figure that's ok because bit 1 and 0 of the
> upper nibble is what sets the data length regardless of the
> states of the lower nibble. I'll ground those other lines
> though, since that's really the right thing to do.
Tie the low 4 bits low.
> It appears that this module isn't getting it's instructions.
> I'd have been real happy if the thing went blank like it did
> for the guy with the BGMicro module. At least then I'd know
> something was happening and could think about using a
> negative contrast voltage, which may not even be needed for my module.
>
I'd agree. I looked at a lot of the PIClist code for LCD's, and found the
timing to be really quite optimistic. Particularly then toggling of the E
line; many of the samples just set it high, NOP, and then set it low again.
It seems that LCDs can miss this. Which is not all that suprising given that
they run at a few hundred KHz, compared to the pic's multiple MHz.
I wrote some 16F870 code with really slow timing that worked very reliably
all the time. unfortunately it's on my home PC, but I can send it to you
tonight if you require.
The only thing that is not clear about your code... Are you *always* in bank
0 when you call LCD_init?
LCD_init
clrf PORTA
bcf LCD_RS
bcf LCD_E
is making an assumption about bank0. After the first time you call LCD_CMD,
you are de=finately in bank 0, but all that initalisation is risky.
The next thing I'd try is putting stupid timing in everywhere. Wait 100ms
between commands, and make your strobe subroutine hold the E line high for
say 5ms.
Give me a shout if you want my code later.
Jon
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2003\11\06@041721
by
hael Rigby-Jones
|
> -----Original Message-----
> > From: @spam@1zlx0fc02KILLspam
SNEAKEMAIL.COM [KILLspam1zlx0fc02KILLspam
SNEAKEMAIL.COM]
> > I'm using 4 bit mode and the lower bits of the module are
> > floating high. I figure that's ok because bit 1 and 0 of the
> > upper nibble is what sets the data length regardless of the
> > states of the lower nibble. I'll ground those other lines
> > though, since that's really the right thing to do.
>
> From: Hulatt, Jon [RemoveMEjhulattTakeThisOuT
MONSTEREUROPE.COM]
> Tie the low 4 bits low.
I respectfully disagree, you do not need to tie the extra four lines low. I
cannot find the document at the moment, but I am positive that the LCD
handles the unconnected pins properly when in 4 bit mode.
> From: Hulatt, Jon [spamBeGonejhulattspamBeGone
MONSTEREUROPE.COM]
> I'd agree. I looked at a lot of the PIClist code for LCD's,
> and found the
> timing to be really quite optimistic. Particularly then
> toggling of the E
> line; many of the samples just set it high, NOP, and then set
> it low again.
How optimistic this is depends entirely on the speed of the PIC. The E
pulse typicaly has a minimum width of 230ns. On a 40MHz PIC, one NOP
between setting the E pin low and high might be getting a bit marginal.
> It seems that LCDs can miss this. Which is not all that
> suprising given that
> they run at a few hundred KHz, compared to the pic's multiple MHz.
But the parallel interface is not simply polled by the processor, if it were
all the control signals would need to be an order of magnitude slower. The
LCD controller has latches on the input.
> From: Hulatt, Jon [TakeThisOuTjhulattEraseME
spam_OUTMONSTEREUROPE.COM]
> The next thing I'd try is putting stupid timing in
> everywhere. Wait 100ms
> between commands, and make your strobe subroutine hold the E
> line high for
> say 5ms.
There really should be no need to start using extreme timings. Simply
follow the manufacturers datasheet to the letter, especialy with regards to
initialisation and there should be no problems. Note also that the LCD
modules have some requirements with regard to supply voltage rise times,
over which the internal reset may not function, powering the device up in an
unknown state. Also note that the busy flag is not readable until you have
fully configured the module for either 4 or 8 bit mode.
Regards
Mike
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2003\11\06@043005
by
hael Rigby-Jones
|
> > From: Hulatt, Jon [EraseMEjhulatt
MONSTEREUROPE.COM]
> > Tie the low 4 bits low.
> From: Michael Rigby-Jones [RemoveMEMichael.Rigby-JonesEraseME
EraseMEBOOKHAM.COM]
> I respectfully disagree, you do not need to tie the extra
> four lines low. I
> cannot find the document at the moment, but I am positive that the LCD
> handles the unconnected pins properly when in 4 bit mode.
The unused data pins should be left open (floating) according to page 7 of
the datasheet.
www.samsung.com/Products/Semiconductor/SystemLSI/DDI/MobileDDI/BWSTN/
S6A0069X/ds_s6a0069.pdf
Regards
Mike
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2003\11\06@045532
by
piclist
|
On 6 Nov 2003 at 8:54, Hulatt, Jon jhulatt-at-MONSTE wrote:
<snip>
> The "Default" internal initialisation of a two line LCD will result in
> exactly what you're seeing here. Set your contrast so that one line looks
> black, and one line looks clear, and leave it at that.
Hmm... it's not so black now that characters are displayed. you can still see them. My
GPS and electronic organizers aren't that readable wit the contrast way down like
that.
I've got 8 and 4 bit code working now. I'm still writing functions, but one thing that is
fouling up is the cursor home command. It hoses my first character. Set DDRAM
Address, OTOH, moves the cursor and doesn't trash any characters it lands on.
>
>
> > I'm using 4 bit mode and the lower bits of the module are
> > floating high. I figure that's ok because bit 1 and 0 of the
> > upper nibble is what sets the data length regardless of the
> > states of the lower nibble. I'll ground those other lines
> > though, since that's really the right thing to do.
>
> Tie the low 4 bits low.
Yeah. Never leave inputs floating. Even TTL. Can you guess which line
absof**kinglutely *must* be tied low? [blush - kick self in ass.]
{Quote hidden}>
>
> > It appears that this module isn't getting it's instructions.
> > I'd have been real happy if the thing went blank like it did
> > for the guy with the BGMicro module. At least then I'd know
> > something was happening and could think about using a
> > negative contrast voltage, which may not even be needed for my module.
> >
>
> I'd agree. I looked at a lot of the PIClist code for LCD's, and found the
> timing to be really quite optimistic. Particularly then toggling of the E
> line; many of the samples just set it high, NOP, and then set it low again.
> It seems that LCDs can miss this. Which is not all that suprising given that
> they run at a few hundred KHz, compared to the pic's multiple MHz.
Min E high (PWeh) is 230ns and tcycE is 500ns. I'm ok with my bsf ; goto $+1 ; bcf
My E strobes are followed by 10ms delays until I write a non-static delay function that
doesn't insert a million NOP's in the code like some of the macros I've seen.
That Universal LCD code on the PIClist site blows my mind. Every data word in the
send function is written as bit sets if the previous bit test finds a 1 bit in the data word
in a temp register. The C compilers will use bit sets to optimise code according to an
algorithm, but bit testing/ setting an output port with btfsc ; bsf ; is ridiculous.
>
> I wrote some 16F870 code with really slow timing that worked very reliably
> all the time. unfortunately it's on my home PC, but I can send it to you
> tonight if you require.
Thanks. Go ahead. I always like to see other code examples. Good way to pick up
tricks.
>
> The only thing that is not clear about your code... Are you *always* in bank
> 0 when you call LCD_init?
The map file showed all registers in bank 0 except the lcd_temp register :-) I'll
incorporarte code to eliminate unneccessary bank selects since I don't like the idea
of forcing storage rules on the linker unless absolutely necessary.
>
>
> LCD_init
> clrf PORTA
> bcf LCD_RS
> bcf LCD_E
>
> is making an assumption about bank0. After the first time you call LCD_CMD,
> you are de=finately in bank 0, but all that initalisation is risky.
Yeah, I see what you mean. PORTA ain't in bank 1 and I could have screwed up. But
I check the map file after adding UDATA sections, etc., since I learnt by shooting
myself in the foot :-)
>
>
> The next thing I'd try is putting stupid timing in everywhere. Wait 100ms
> between commands, and make your strobe subroutine hold the E line high for
> say 5ms.
The 10ms overkill is working fine.
>
>
>
> Give me a shout if you want my code later.
If I don't hear from you I'll shout again.
Thanks and Best Regards,
Mike
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2003\11\06@051024
by
piclist
|
On 6 Nov 2003 at 9:16, Michael Rigby-Jones Michael.R wrote:
<snip>
> > From: Hulatt, Jon [RemoveMEjhulattKILLspam
MONSTEREUROPE.COM]
> > Tie the low 4 bits low.
>
> I respectfully disagree, you do not need to tie the extra four lines low. I
> cannot find the document at the moment, but I am positive that the LCD
> handles the unconnected pins properly when in 4 bit mode.
I respectfully submit that even if the module does handle it, the pins float high and
waste current. I've got them connected, still, from my 8-bit test, so I can't verify if it
will work and I don't feel like disconnecting them yet, but any digital designer worth
his salt will tell you to tie unused inputs to something. With CMOS, not doing so is
asking for trouble. This is TTL AFAIK, but the rule still applies.
<snip>
> But the parallel interface is not simply polled by the processor, if it were
> all the control signals would need to be an order of magnitude slower. The
> LCD controller has latches on the input.
Yup. Thus the setup times for the gozintas in the timing diagram.
{Quote hidden}>
> > From: Hulatt, Jon [
jhulattSTOPspam
spam_OUTMONSTEREUROPE.COM]
> > The next thing I'd try is putting stupid timing in
> > everywhere. Wait 100ms
> > between commands, and make your strobe subroutine hold the E
> > line high for
> > say 5ms.
>
> There really should be no need to start using extreme timings. Simply
> follow the manufacturers datasheet to the letter, especialy with regards to
> initialisation and there should be no problems. Note also that the LCD
> modules have some requirements with regard to supply voltage rise times,
> over which the internal reset may not function, powering the device up in an
> unknown state. Also note that the busy flag is not readable until you have
> fully configured the module for either 4 or 8 bit mode.
I'll remember to dig for that spec. just in case I ever need to use a lame supply.
I'd allow a little slack for temperature variations, especially if the PIC is running off
the internal clock. Mine's running at 6MHz internally (1.5MHz on CLKOUT). It's
getting a crystal since it will eventually have a timing function. It did run slower when I
first got it.
Regards
Mke
Look... an echo
vvvvv
{Quote hidden}>
> Regards
>
> Mike
>
>
>
>
> =======================================================================
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2003\11\06@051440
by
Jinx
> > Tie the low 4 bits low.
> I respectfully disagree, you do not need to tie the extra four
> lines low. I cannot find the document at the moment, but I
> am positive that the LCD handles the unconnected pins
> properly when in 4 bit mode.
Data pins have weak active PMOS pull-ups, just like those
that can be enabled on PIC I/O
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2003\11\06@054215
by
piclist
On 6 Nov 2003 at 9:29, Michael Rigby-Jones Michael.R wrote:
<snip>
> The unused data pins should be left open (floating) according to page 7 of
> the datasheet.
> www.samsung.com/Products/Semiconductor/SystemLSI/DDI/MobileDDI/BWSTN/
> S6A0069X/ds_s6a0069.pdf
Which is for the 0069 chip and mine is a 0066, FWIW. Thanks for the extra spec.
Now Jinx has indicated that they have weak pullups. My perusal of the HD44780
spec sheet yesterday ( you'd think that would be at the beginning) when I wanted to
see if I was dealing with CMOS revealed nothing of the technology, but the lame
spec from Timeline, Inc. led me to believe it was TTL.
It's all there at the *end* of the HD44780 spec and sure enough...
Pullups... max 250uA. Another mA to kill the batteries. Oh well, it could be worse.
>
> Regards
>
> Mike
Ditto. :-)
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2003\11\06@054836
by
Alan B. Pearce
>> > Tie the low 4 bits low.
>
>> I respectfully disagree, you do not need to tie the extra four
>> lines low. I cannot find the document at the moment, but I
>> am positive that the LCD handles the unconnected pins
>> properly when in 4 bit mode.
>
>Data pins have weak active PMOS pull-ups, just like those
>that can be enabled on PIC I/O
That is my understanding too, and so pulling the lines low will actually
increase the current draw :)
Also as I remember the data sheet, the floating state of the lines is
correct for the 8 bit initialisation word, as the I seem to recall the
configuration words that get loaded to change between 4 bit and 8 bit modes
have the appropriate bits in the "line float" state, so they get understood
correctly if the chip is in 8 bit mode and is going to 4 bit mode.
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2003\11\06@055252
by
Russell McMahon
|
> ...................but any digital designer worth his salt will tell you
to tie
> unused inputs to something
unless the data sheet specifically indicates otherwise...........
I'm sure that's what you meant, wasn't it ? ;-)
(Slow email traffic night here ....)(doing accounts/tax / .... )
Just found $5000 odd of equipment that I didn't invoice anyone for back in
April this year. The night may be profitable yet :-). Government ultimately
pays in this case so the money is safe, enough. Um, actually, maybe not.
I've got a Genetic Engineering magazine article coming out Sunday and
several people who have read it have suggested that the Prime Minister is
going to be 'annoyed' with me :-(, (Not my intention but iot may be
unavoidable, alas). So maybe I'm going to have trouble getting my money
after all :-(
RM
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2003\11\06@060914
by
Alan B. Pearce
2003\11\06@060916
by
piclist
On 6 Nov 2003 at 23:53, Russell McMahon apptech-at-PA wrote:
> > ...................but any digital designer worth his salt will tell you
> to tie
> > unused inputs to something
>
> unless the data sheet specifically indicates otherwise...........
>
> I'm sure that's what you meant, wasn't it ? ;-)
Yeah. I posted that before all that pullup info was brought up. The Slambung, er,
Samsung data sheet (which I didn't have) puts it up front and Hitachi buries it toward
the end of a sheet twice as long. Pretty good chips, really.
Good lick collecting the Dineros (pounds?). That little aside about the article pissing
off the PM was funny.
Regards,
Mike
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2003\11\06@062209
by
hael Rigby-Jones
|
> -----Original Message-----
> From: piclist [RemoveME1zlx0fc02
spamBeGoneSNEAKEMAIL.COM]
> Sent: 06 November 2003 10:41
> To: spamBeGonePICLIST@spam@
spam_OUTMITVMA.MIT.EDU
> Subject: Re: [PIC:] LCD & KS0066 - Another goofy prob?
>
> Which is for the 0069 chip and mine is a 0066, FWIW. Thanks
> for the extra spec.
Apparently Samsung have two numbers for the same part. The link to this
datasheet says "S6A0069X (KS0066U)". Oh well, glad you got it all working
anyway.
Cheers
Mike (RJ)
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2003\11\06@062831
by
Russell McMahon
|
> Good lick collecting the Dineros (pounds?). That little aside about the
article pissing
> off the PM was funny.
It may not be come Monday :-(.
She is not the sort of person that one wants to annoy excessively.
As somebody said about one of our earlier women politicians - "The softest
thing about her are her teeth". It's actually quite a compliment.
I thought about various ways to say things but in the end I HAD to say that
she was saying things that are scientifically unsupportable (she is) and
that either she is receiving bad advice (which she probably is) and doesn't
know it or she knows it but is saying what she is for whatever reason.
Either way someone gets unhappy. I think it is a case of corporate blindness
on a large scale. Like the emperor without clothes in the fairy tale.
Everyone sees things the way they want them to be and it all gets self
fulfilling after a while as everyone tells everyone else what they want to
hear. What I'd LIKE to happen is for politicians to realise that they
haven't quite heard their advisers correctly and shift positions without
anyone actually being to blame. The advisers of course haven't realised that
they have been being misheard and adjust their advice to 'make it more
clear'. Win win as long as we all end up working together. What's more
likely is that people will want to shoot or ignore the messenger. The latter
if few people pick up on the article. I'll be trying to ensure that that
doesn't happen.
I don't know if my contribution will cause national ructions or, more
likely, sink like a stone into the pond of middle class apathy. We'll see.
RM
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2003\11\06@063453
by
Wouter van Ooijen
> > Tie the low 4 bits low.
>
> I respectfully disagree, you do not need to tie the extra
> four lines low. I
> cannot find the document at the moment, but I am positive that the LCD
> handles the unconnected pins properly when in 4 bit mode.
I dunno for clones, but the HD44780 has pull-ups or pull-downs (I don't
remember which). This is not stated explicitly in the datasheet, but the
electrical characteristics mention how strong (or weak) the pulls are.
Wouter van Ooijen
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2003\11\06@064114
by
Jinx
> It's all there at the *end* of the HD44780 spec and sure enough...
>
> Pullups... max 250uA. Another mA to kill the batteries. Oh well,
> it could be worse.
It's probably better. Typical spec is ~125uA and could be 50uA.
From memory a 16x2 takes around 3mA, which is well within the
drive capability of a PIC pin. So the display's V+ can be under
s/w control to power it down if desired, for example if the PIC is
put to sleep.
It should also be possible to charge-pump a low voltage PIC's pin
to make 5V (or at least > 4.6V I think) for the LCD's V+ if running
on a couple of AAs. Alpha-numeric LCD input specs look as
though they should be OK with LV PIC output voltages if > 2.2V
and the only V limiting needed is on d7 when (if) reading Busy
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2003\11\06@084732
by
Russell McMahon
> It should also be possible to charge-pump a low voltage PIC's pin
> to make 5V (or at least > 4.6V I think) for the LCD's V+ if running
> on a couple of AAs.
Rule of thumb is a no load supply will get to within 2 diode drops of pump
Vdd with silicon diodes and a single stage pump. ie about 4v8 with 3v Vdd.
Your two AA's will drop below 3v fairly soon in their life.
Using Schottky small signal diodes (BAT85 etc) will give you about Vdd- 0.5v
boost or about 4v5 for Vdd = 2v5 or more. Synchronous switches and multiple
stages get you more voltage at the cost of complexity (and diminishing
returns per stage)
RM
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2003\11\06@091320
by
William Bross
BTW, if anybody is looking for LCD controller data sheets, Hantronix has
a nice set of the ones they use, including the KS0066 at:
http://www.hantronix.com/3_2.html
Bill
{Original Message removed}
2003\11\06@101136
by
Bob Ammerman
> It's all there at the *end* of the HD44780 spec and sure enough...
>
> Pullups... max 250uA. Another mA to kill the batteries. Oh well, it could
be worse.
> >
> > Regards
> >
> > Mike
They won't kill the batteries if you leave the unused ones disconnected and
let the ones that you use idle at high.
Bob Ammerman
RAm Systems
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2003\11\06@175602
by
Jinx
2003\11\08@055742
by
Peter L. Peres
> From memory a 16x2 takes around 3mA, which is well within the drive
> capability of a PIC pin. So the display's V+ can be under s/w control to
> power it down if desired, for example if the PIC is put to sleep.
No, it's not. The pic output current and the decoupling cap on the lcd
will slow the swithcing down too much and the panel won't come out of
reset. Use a 2N7000 to switch the low side of the panel supply if you have
to.
Peter
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2003\11\08@055744
by
Peter L. Peres
> I respectfully submit that even if the module does handle it, the pins
> float high and waste current. I've got them connected, still, from my
> 8-bit test, so I can't verify if it
They do not float high, they are pulled high on most controllers. Leave
them unconnected and put a uA-meter between one and ground. You should see
50uA of current or so. This is very useful when connecting to a 8051 port.
Peter
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2003\11\08@065046
by
Jinx
> > From memory a 16x2 takes around 3mA, which is well within the
> > drive capability of a PIC pin. So the display's V+ can be under s/w
> > control to power it down if desired, for example if the PIC is put to
> > sleep.
>
> No, it's not. The pic output current and the decoupling cap on the lcd
> will slow the switching down too much and the panel won't come out of
> reset. Use a 2N7000 to switch the low side of the panel supply if you
> have to
Sorry, have to disagree to some extent. I've units with LCDs that
are put to sleep that wake on an RS232 IRQ. The LCD's V+ is in
my case b7 and powers down when the PIC sleeps. In fact all lines
going to the LCD are low during sleep. When the PIC wakes up,
all data and control lines are held at 0 for a few 10s of ms after b7
goes high, then the LCD is initialised. Works every time
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