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'[PIC:] Disconnecting SDA and SCL'
2004\06\28@013626 by Jinx

face picon face
Has anyone suggestions for disconnection of SDA and SCL of
an I2C buss in a power-down situation ?

The set-up is ;

PCF8593, with its own back-up battery and supercap, primarily
run on PIC Vcc

connected by I2C to

18F452, mains-powered, also with a back-up battery

SDA and SCL each have 22k pull-ups

Now, the last thing ever to lose power must be the PCF8593,
so conserving its battery is important. To get the 1uA standby
means disconnecting the pull-ups from the I2C lines. A pair of
series transistors or FETs on the PCF8593's side of the pull-
ups would do wouldn't they ? Some series resistance is allowed
in I2C. They could be turned on/off by a PIC pin or PIC Vcc. Has
to be fail-safe if the PIC side lost power altogether. ie if all else
was dead, the PCF8593 should be left quietly humming to itself
with no pull-ups

TIA

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2004\06\28@021452 by Brent Brown

picon face
On 28 Jun 2004 at 17:34, Jinx wrote:

> Has anyone suggestions for disconnection of SDA and SCL of
> an I2C buss in a power-down situation ?
>
> The set-up is ;
>
> PCF8593, with its own back-up battery and supercap, primarily
> run on PIC Vcc

Philips have an App note that covers their RTC chips,  (PCF8563/73/83/93)
and mentions some hints for low power. A quick look at it didn't show any
magic circuit like you might be looking for, but worth a read anyway. Can
send it off-list if you like.

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2004\06\28@022113 by Ken Pergola

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face
Jinx wrote,

> Now, the last thing ever to lose power must be the PCF8593,
> so conserving its battery is important. To get the 1uA standby
> means disconnecting the pull-ups from the I2C lines.

Hi Joe,

I could not discern from your post whether you are just speculating at this
point or if you have actually gathered real-world measurements from a
prototype of your setup with the pull-ups still connected. I think it's
great to think about this (pull-up connect/disconnect approach), but your
real-world experiments and data might prove that you may be able to get away
from complicating things (by adding circuitry to connect/disconnect the
pull-ups). Just trying to help here without seeing a schematic of your
setup. Would you be able to shed some more details?:

1) Have you made any current measurements yet? If so, what are your results?
2) How long does this RTC have to keep the time in absence of normal power?
Days? Weeks? Months? Years?
3) What is you mA/H rating of your current battery?

Best regards,

Ken Pergola

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2004\06\28@023940 by Chetan Bhargava

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Hi,

Maxim has a good range of RTCs that have internal switch-over to backup battery.

If you don't want to change the RTC chip, you can put CMOS switches
like 4066 in between the SDA and SCL lines and control them with mains
power.

I had read an article in Elektor that used LTC4300 and supported hot
swap of i2c devices.

Regards,

Chetan Bhargava
http://www.bhargavaz.com

On Mon, 28 Jun 2004 02:21:04 -0400, Ken Pergola <EraseMEno_spamspam_OUTspamTakeThisOuTlocalnet.com> wrote:
>
> Jinx wrote,
>
> > Now, the last thing ever to lose power must be the PCF8593,
> > so conserving its battery is important. To get the 1uA standby
> > means disconnecting the pull-ups from the I2C lines.
>
>

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2004\06\28@024149 by Robert Rolf

picon face
Jinx wrote:

> Has anyone suggestions for disconnection of SDA and SCL of
> an I2C buss in a power-down situation ?

Small reed relays? PHOTOMOS relays (Aromat make a nice line of them).
AQV210S et al. Power the LED off the PIC supply. 5mA is enough.

The problem with P channel FETs in the classic switch (gate pulled
low) mode is that the body diode conducts when source is
less than drain so when the PIC is off, the body diode conducts.

Something like a 4066 powered from the PCF side might work
since it's on resistance is 60R. The PIC would drive the
G line high to turn on the gate, and a large value pulldown
would turn the gate off when the PIC power dies.

{Quote hidden}

No, it only means that the pull-ups must not have a low
level hanging on them.

> series transistors or FETs on the PCF8593's side of the pull-
> ups would do wouldn't they ? Some series resistance is allowed

No, because your PCF* would no longer have a pullup on it's
I2C lines. You want to idle the device don't you, not have
it stuck in a 'start' state with inputs floating whereever they
please?

> in I2C. They could be turned on/off by a PIC pin or PIC Vcc. Has

I'd suggest PIC Vcc so if the PIC hangs, and the user power
fails it to reset, you get want you want, no loading.

> to be fail-safe if the PIC side lost power altogether. ie if all else
> was dead, the PCF8593 should be left quietly humming to itself
> with no pull-ups

It NEEDS pullups (unless it already has them internally).
You NEVER float CMOS inputs, unless you WANT high standby
current, and great susceptibility to noise (EMI).

Robert

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2004\06\28@040854 by Jinx

face picon face
> Philips have an App note that covers their RTC chips

Brent - I have that in the I2C Peripherals handbook. Also a
couple of non-Philips hints pdfs, thanks

> if you have actually gathered real-world measurements from
> a prototype of your setup with the pull-ups still connected.......
> might prove that you may be able to get away from complicating
> things (by adding circuitry to connect/disconnect the pull-ups)

Ken - Yes, I have done some preliminary measurements with the
PFC8593. Current coming from a 4 x NiCd pack is 20uA with
PIC on and supplying Vcc ( ~50uA when the PIC communicates).
and around 400uA with the PIC off. Disconnecting the pull-ups in
this state drops the battery drain to ~5uA, which is close to the
book value at 5V. This could be reduced by using a lower V
battery, one alkaline D cell would be enough, and increasing
Rreset. This is presently a 56k pull-up, but could be quite a bit
higher (leakage figure is 250nA)

Chetan and Robert - good idea about the 4066, worth a look

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2004\06\28@073432 by Matthew Brush

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I second the 74HC4066 analog switches assuming you
actually do need disconnect those pullups.  I think
the on resistance of these switches is 50ohms IIRC.

Just my $0.02 CAD

Cheers

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LeftClick.ca Internet Media Services
mbrush@[NOSPAM]leftclick.ca

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2004\06\28@073433 by Buehler, Martin

picon face
i don't know the pcf8593, but used the pcf8573 a few times.
with this one, you connect the pull ups to the power supply of the pic,
i.e. only the pcf8573 itself is powered from the backup battery.
as far as I remember, the pcf8573 powers it's i2c i/f down when both scl
and sda stay low.
btw. I don't use battery backups anymore. I use capacitors instead,
reducing the required circuitry and giving better long term results
(batteries are dead after a few years).
tino

************************************************************************
******************************

>{Original Message removed}

2004\06\28@080418 by Jinx

face picon face
> I don't know the pcf8593, but used the pcf8573 a few times

The PCF8573 is a more sophisticated IC. It has power-failure
detection and provision for a single back-up NiCd

> with this one, you connect the pull ups to the power supply of the pic,

SDA and SCL limit is Vdd+0.8V, so you'd have to be careful which
Vdd they're connected to

> btw. I don't use battery backups anymore. I use capacitors instead,
> reducing the required circuitry and giving better long term results
> (batteries are dead after a few years).
> tino

That's true, but I've found supercaps don't last forever either. The
system will be monitored and alarmed. There's no reason why the
PIC can't also measure the batteries and warn that they've gone
off or approaching nominal lifetime

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2004\06\29@183944 by Peter L. Peres

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>PCF8593, with its own back-up battery and supercap, primarily
>run on PIC Vcc

What does the PCF8593 datasheet say about quiescent current in I2C start
condition ? If you do not use pullups on the PCF then this will happen
when the external power goes down, unless you take the I2C pins down one
by one in the proper order (SCL first).

Peter

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2004\06\29@184836 by Peter L. Peres

picon face
A 4066 or any other chip will show its own pin protection diodes (and
output MOSFET reverse diodes) if powered down.

The simplest solution would be to cut the power to the pullups in order
(SCL first) and provide two high value (1Meg ?) pulldown resistors to
define the Vil on the PCF when the rest of the circuit is not quite
powered down.

The transistor powering the SCL pullup could be actuated by the power
monitor (reset chip) of the PIC standby voltage. It would have to be a
double 'back to back' pfet (so there is no reverse diode to deal with).

Peter

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2004\06\29@185043 by Jinx

face picon face
> What does the PCF8593 datasheet say about quiescent current
> in I2C start condition ?

I don't believe it says anything. There are 3 current specs in the d/s

Operating - 200uA max
I2C bus inactive - 15uA max
Input leakage - +/- 1uA

> If you do not use pullups on the PCF then this will happen when
> the external power goes down, unless you take the I2C pins
> down one by one in the proper order (SCL first).

I'm spending some time today making up a proper ground plane
PCB to (a) make sure the clock is stable/reliable and (b) try out
different switching arrangements (if necessary) of the pullups, so
I'll have to get back to you about that

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2004\06\29@195518 by Robert Rolf

picon face
Jinx wrote:
>
> > Philips have an App note that covers their RTC chips
>
> Brent - I have that in the I2C Peripherals handbook. Also a
> couple of non-Philips hints pdfs, thanks
>
> > if you have actually gathered real-world measurements from
> > a prototype of your setup with the pull-ups still connected.......
> > might prove that you may be able to get away from complicating
> > things (by adding circuitry to connect/disconnect the pull-ups)
>
> Ken - Yes, I have done some preliminary measurements with the
> PFC8593. Current coming from a 4 x NiCd pack is 20uA with
> PIC on and supplying Vcc ( ~50uA when the PIC communicates).
> and around 400uA with the PIC off. Disconnecting the pull-ups in

I'll say it again.
Pullups/pulldowns DON'T DRAW ANY POWER if they are NOT
pulling against anything.
A CMOS input is something like 10^^12 ohms. Your board
leakage is magnitudes larger than that.
You do NOT want your inputs floating. EVER.

Does your chip have internal pullup or pulldowns?
If it doesn't you MUST supply them externally or pay
the consequences (random failures and high power draw).

> this state drops the battery drain to ~5uA, which is close to the
> book value at 5V. This could be reduced by using a lower V
> battery, one alkaline D cell would be enough, and increasing
> Rreset. This is presently a 56k pull-up, but could be quite a bit
> higher (leakage figure is 250nA)
>
> Chetan and Robert - good idea about the 4066, worth a look

Thanks.

www-s.ti.com/cgi-bin/sc/family3.cgi?family=STANDARD+BUS+SWITCHES
http://focus.ti.com/docs/prod/folders/print/cd4066b.html

4066B spec is:
5V Icc at 25C is 10 NANO amps.
10 PICO amp off leakage
5V on resistance is 470R

Show me a better solution!
(4066B powered by PFC supply, pullups on PFC side of 4066).

Robert

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2004\06\30@003437 by Jinx

face picon face
part 1 1059 bytes content-type:text/plain; (decoded 7bit)

> I'll say it again.
> Pullups/pulldowns DON'T DRAW ANY POWER if they are NOT
> pulling against anything

Yes, of course. I realise that and that's why the discussion about
how to disconnect them so that they aren't either connected to a
dead PIC or being a burden on the back-up battery/cap

This is a circuit I've just made

I2C still works (I have the PIC reading the PCF8593 and updating
an LCD every 0.2s)

With the PIC turned off, consumption is 7uA (excellent, I can
certainly live with that), rising to 50% duty cycle ~50uA if INT
is active (1Hz INT activity shows that the IC is still running)

The ?nF can be installed to introduce a delay and so turn SDA
after SCL. I'll have to read up on that

This by no means a final circuit, but as it appears to have worked
straight out of box I can leave it alone for a day or two while I get
back to the w


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part 2 3342 bytes content-type:image/gif; (decode)

2004\06\30@112149 by Alan B. Pearce

face picon face
www.linear-tech.com/pub/document.html?pub_type=desn&document=291

Jinx
You should probably look at this link for Hot Swap info on I2C. Haven't read
it closely, so may not be micropower enough for you, but interesting chip
anyways.

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2004\06\30@144759 by Robert Rolf

picon face
I had written up a detailed critique of your schematic, but since
you're not hearing me w.r.t pullups, I'll not waste bandwidth by
posting it. You're doing it way more complicated than it needs to be
with part choices that are less than optimal.
R

Jinx wrote:
{Quote hidden}

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2004\06\30@152149 by Ken Pergola

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face
Hi Joe,

I guess I'm confused with this thread. I'm probably missing something
obvious. It sounds like the RTC is only drawing 7 uA when the main Vcc is
switched off and you are ok with that.

Here's where I'm confused:

Why does it matter to you if the pull-ups become "a burden" if you have a
dead PIC? Your schematic shows a NiCad battery -- the battery will just get
discharged. I could see if the battery was a non-rechargeable type, as this
could get expensive (replacing batteries), but you have a rechargeable
battery that can just get recharged, right? The board will be useless anyway
with the dead PIC and the 470 ohm resistor will limit current output on the
NiCad. Most SuperCaps have a pretty high internal resistance so it probably
will discharge gracefully as well.

Please understand that I'm not trying to be you on the spot or anything --
I'm just trying to better understand this thread so that I could offer any
help to you (if I'm able to). I've worked with the Philips PCF8563 RTC in
the past. In my case, I did not have the liberty to use large-value pull-ups
since serial EEPROMs were also connected to the I2C bus.

Best regards Joe,

Ken Pergola

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2004\06\30@152812 by Ken Pergola

flavicon
face
Robert Rolf wrote:

> I had written up a detailed critique of your schematic...

Hi Robert,

Since you've already spent the time, I would like to see your critique in
the spirit of learning and adding to this thread (as long as it's
constructive criticism and does not put anyone on the spot or make them feel
bad, and I'm not implying that you will). Real-time clocks are fun and
design reviews are a good learning experience.

Thanks Robert.

Best regards,

Ken Pergola

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2004\06\30@160644 by Robert Rolf

picon face
Ken Pergola wrote:
> Robert Rolf wrote:
> > I had written up a detailed critique of your schematic...

> Since you've already spent the time, I would like to see your critique in
> the spirit of learning and adding to this thread (as long as it's
> constructive criticism and does not put anyone on the spot or make them feel
> bad, and I'm not implying that you will). Real-time clocks are fun and
> design reviews are a good learning experience.

You asked.
How 'constructive' this will be is a matter of
interpretation and the mood of the recipient.

Jinx wrote:

> > I'll say it again.
> > Pullups/pulldowns DON'T DRAW ANY POWER if they are NOT
> > pulling against anything
>
> Yes, of course. I realise that and that's why the discussion about
> how to disconnect them so that they aren't either connected to a
> dead PIC or being a burden on the back-up battery/cap

Is the PCF driving the I2C bus when power failed?
If it isn't (why would it, it's a slave) then you have
no reason to disconnect the I2C pullups. The power failed
PIC is the chip needing the 1M pulldowns.

{And since there is no power draw, the pullups can be as
'stiff' as you need them to be for your bus loading, within
the limits of the on resistance of the 4066. You can also
distribute the pullup value between the PCF and the PIC side
if need be.
e.g. 100k on the PCF, 2k2 on the PIC and other high speed stuff.

> This is a circuit I've just made

Reasonable but I have some questions and criticisms.

Why does the xtal trimcap go to Vcc rather than ground?
Vcc is much more noisy than grounds (usually) so you end
up coupling noise into the crystal, jittering the clock, giving
timing errors in the long term
(if that wasn't an issue why the trimmer?)
And most trim's I've seen for 32khz xtals are across the xtal.
(Dallas 1302 for example).

What is the width of the /int pulse?
Why are you not disconnecting it with one of the 4066 gates?
Using a larger value pullup would reduce your standby current draw,
but since it's an output you can put the pullup on the PIC side
of the 4066 and have NO periodic current increase from the 1 Hz int.

NiCads are lousy batteries for backups since their self leakage
is high. A diode connected 3V lithium would give you 10 year
shelf life. Ni-Cads are lucky to give you 3 months (just look at your
old 486 motherboard to see your dead nicad).

Why are you not using a 4066 which has a much lower on resistance?
Why are you disconnecting the pullups when there is no
need to do so (per my reapeated comments on this point)?
Why pulldown the I2C inputs when the idle state of the bus is high?
www.ibilce.unesp.br/courseware/i8051/i2c_1.htm
" I2C Bus Idle State Both data and clock lines are HIGH when the bus
is not busy."
You just run the risk of creating a false start state or otherwise
erroneous states.
You certainly do NOT want to load the data line with nF worth
of capacitance since that reduces your noise margins.
You don't need the cap to control slope if you leave
the pullups connected to the PCF chip.

You don't need the 1M Pic Vcc pulldown since the PIC chip will do that
for you (to about 0.6V).

> I2C still works (I have the PIC reading the PCF8593 and updating
> an LCD every 0.2s)

I am surprised that is works if you really have nF cap on the SDA line.
And you have about twice as many passives as you need.
You also don't show how you're driving the 4016 gate since you
want it to go low well before the PIC pulls down the control lines.
Presumably you are tying it to /MCLR which is driven by your LVD (low
voltage detect) (but with resistor diode clamp isolation should
you be doing ICSP, where /mclr goes to 12V.

> With the PIC turned off, consumption is 7uA (excellent, I can

What is the PCF spec? You should be able to get below that.
With a Dallas 1302 my standby (3v) is so low I can't measure
it reliably with my Fluke 87 (certainly less than 0.5 uA
when looking at the voltage drop across a 1k measurement resistor).

> certainly live with that), rising to 50% duty cycle ~50uA if INT
> is active (1Hz INT activity shows that the IC is still running)

So make the 100k /INT pullup much larger. Or disconnect it
since the PIC can't doing anything with the pulse when it
is unpowered.

> The ?nF can be installed to introduce a delay and so turn SDA
> after SCL. I'll have to read up on that

You DO NOT NEED OR WANT IT.
Delay the 4066 gate pullup to Vcc (enable delay) with that cap instead,
ensuring that the PIC is alive and well before connecting the
PDF to the bus.


> This by no means a final circuit, but as it appears to have worked

I hope not. It has many flaws.

> straight out of box I can leave it alone for a day or two while I get
> back to the w

My advice is worth exactly what you paid for it.
Should you find that you use it, contact me off list for
royalty info <G>.

Robert

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2004\06\30@160843 by Peter L. Peres

picon face
>> What does the PCF8593 datasheet say about quiescent current
>> in I2C start condition ?
>
>I don't believe it says anything. There are 3 current specs in the d/s
>
>Operating - 200uA max
>I2C bus inactive - 15uA max
>Input leakage - +/- 1uA

That would be 'everything'. It means if SCL goes down after SDA the chip
will have 10x quiescent current from its backup source.

>I'm spending some time today making up a proper ground plane
>PCB to (a) make sure the clock is stable/reliable and (b) try out
>different switching arrangements (if necessary) of the pullups, so
>I'll have to get back to you about that

The more I think about this the more I believe there is a problem here.
The simplest pullup switch would be a PN2222 with base to the power
monitor of the PIC (high = operating, low = reset), collector to pic +Vdd
and emitter to SCL pullup resistor. There would also be a pulldown on SCL
and SDA, both 500k-1meg. SDA pullup would also be powered by the PIC Vdd.

There could also be a problem with the SDA and SCL voltages floating in
the 'forbidden' voltage area of the PCF input buffers (which would cause
said buffers to drain extra power from the PCF backup system). Is that 1uA
leakage guaranteed over input voltage range or at Vil and Vih only ? Are
the PCF inputs specified as Schmitts ? (I don't think so). If they are
Schmitts then this problem may not exist (unless they are pre-buffered
Schmitts).

Peter

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2004\06\30@182905 by Jinx

face picon face
> You asked
> How 'constructive' this will be is a matter of
> interpretation and the mood of the recipient.

I'm never a grumpy ingrate when it comes to circuit advice. 1/2
dozen people have made suggestions and I'm just trying to sort
out what is going to be an optimum arrangement. I'm not familiar
with the physical intricacies of the I2C buss and I appreciate your
patience and efforts, really I do

> Is the PCF driving the I2C bus when power failed?

No, but I2C is idling. Both SDA and SCL high

> If it isn't (why would it, it's a slave) then you have
> no reason to disconnect the I2C pullups. The power failed
> PIC is the chip needing the 1M pulldowns.

In an earlier post I mentioned that, in the conventional simple
arrangement of PCF8593+pullups+PIC, if the PIC is turned off
the backup current is 400uA. With the pullups disconnected in
this condition it drops to 5uA.  In the original circuit the PCF
was supplied with V from the PIC via a diode and the  battery
via a diode. The pullups went to the PCF's Vcc. I had assumed
that the excess current was going through SDA and SCL into
the dead PIC, hence disconnecting them

In mitigation I'd offer that I'm very busy with s/w that needs
doing for the PIC and could have missed something all too
obvious. I'd also like several other charges of circuit-building
without due care and attention taken into consideration ;-)

> Why does the xtal trimcap go to Vcc rather than ground?

That is Philips' advice for the PCF8593 specifically. And some
of their RTCs have the crystal case grounded, others to Vcc

> What is the width of the /int pulse?

500ms on, 500ms off

> Why are you not disconnecting it with one of the 4066 gates?

Because it can be turned off within the PCF8593. As far as I know.
I'm still playing around with the alarm and timer registers. I'd no
plans to use it in this application, but will hook it up to a PIC INT
input and investigate the pullup size

> NiCads are lousy batteries for backups since their self leakage
> is high. A diode connected 3V lithium would give you 10 year
> shelf life. Ni-Cads are lucky to give you 3 months (just look at your
> old 486 motherboard to see your dead nicad)

A NiCd 4-pack is all I had to hand that I could make some
measurements with. I know about their self-discharge and would
not use them for long-term backup

> Why are you not using a 4066 which has a much lower on
> resistance?

I found a 4016 first, I'll be replacing it with a 4066 as soon as

> Why are you disconnecting the pullups when there is no
> need to do so (per my repeated comments on this point)?
> Why pulldown the I2C inputs when the idle state of the bus
> is high?

Well, I can only direct you back to the 400uA measurement I
made. It could well be that this circuit is over-engineered and
needs trimming back. I do and did get your point about pullups
not using power if they aren't pulling against something

> You certainly do NOT want to load the data line with nF worth
> of capacitance

I'm not putting any capacitance on the lines

> if you really have nF cap on the SDA line

It isn't actually installed, but if it were to be it isn't on SDA. It's on
the control line to the switches that disconnect the SDA pullup.
SDA and SCL have no added capacitance

> > With the PIC turned off, consumption is 7uA
>
> What is the PCF spec?

Around 5uA at 5V, 1uA at 1V. 2.5V minimum for I2C operation.
This is not a situation where the circuit will or should be powered
down for days, weeks or months. The PIC is still supposed to be
doing some work after all. Although primarily the backup is for
power cuts, battery changing etc, it is possible that the user would
intentionally turn off or disconnect the PIC, but that shouldn't be
for any great length of time. And if it was the whole thing would
have to be reset anyway

> > The ?nF can be installed to introduce a delay and so turn
> > SDA after SCL. I'll have to read up on that
>
> You DO NOT NEED OR WANT IT

That was pencilled in per a comment by Peter Peres

> Delay the 4066 gate pullup to Vcc (enable delay) with that cap
> instead, ensuring that the PIC is alive and well before connecting
> the PCF to the bus

The PIC has several other things to do, like LCD init, check serial
comms to another device, and wouldn't look at the I2C buss for a
while after power-up

> My advice is worth exactly what you paid for it
> Should you find that you use it, contact me off list for
> royalty info <G>

Or you could contact me and see what you can get ?? ;-)))

Thanks a lot, I mean that

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'[PIC:] Disconnecting SDA and SCL'
2004\07\01@215042 by Jinx
face picon face
> Please understand that I'm not trying to be you on the spot or
> anything -- I'm just trying to better understand this thread so that
> I could offer any help to you (if I'm able to). I've worked with the
> Philips PCF8563 RTC in the past. In my case, I did not have the
> liberty to use large-value pull-ups since serial EEPROMs were
> also connected to the I2C bus.
>
> Best regards Joe,
>
> Ken Pergola

Thanks for your comments Ken. I have been trying to get back to
the circuit, but time didn't permit. Although it's an important part
of the project in the long-term, right now it isn't and there are other
things that need to be done to show the customer that I'm making
progress. ie he will appreciate data flying about on an LCD, but
not that I've spent a week looking into I2C etc, even though it had
to be done

I'm wondering whether because so many ICs now have very low
sleep currents and that it's expected an IC like the PCF8593 will
not be the last man standing in a circuit, but would be connected
to a buss that is asleep but not dead. I'm hoping to get the iron
back out in the next day or two

One other thing I did manage to fit in was to try out TB028, which
converts Day to a day number 0 - 7 (=Sun - Sat) in AccValue. This
is not strictly needed for my application but it gives just that little bit
more feedback for the user. It appears to work, although I'd like to
tidy it up at some stage. Note that the Valid Date routine has been
ditched because my source cannot supply bad dates/times

http://ww1.microchip.com/downloads/en/AppNotes/91028a.pdf

;================================================
;        Calculate day of week TB028 (18F452 version)
;================================================

        cblock  0x0580

        YearHi
        YearLw
        Month
        Day
        AccValue
        TempA
        TempB
        TempYH
        TempYL
        Lbyte
        Hbyte
        Ltemp
        Htemp
        TempH

        endc

cdow     movlb   .5           ;use bank5 RAM

;example
;         mov     0x20,TempA   ;date = 4th July 2004
;         mov     0x04,TempB
;         mov     .7,Month
;         mov     .4,Day

        call    BCDtoBin

        movff   Lbyte,YearLw
        movff   Hbyte,YearHi

        call    get_day

        return

get_day  clrf    AccValue

        mov     0xc6,TempYL
        mov     .7,TempYH

getday0  call    CompYear
        skpnz
        bra     getday1

        incf    AccValue
        call    IsLeapYr
        skpnz
        incf    AccValue

        call    IncTemp
        bra     getday0

getday1  movlw   .3
        subwf   Month,w
        skpc
        bra     getday2

        call    IsLeapYr
        skpz
        bra     getday2
        incf    AccValue

getday2  mov     0x1a,pclath
        rlncf   Month,w
        call    Mnth_val
        addwf   AccValue
        movfw   Day
        addwf   AccValue
        call    modula7
        return

modula7  movlw   .7
        subwf   AccValue,w
        skpc
        bra     modula70
        movlw   .7
        subwf   AccValue
        bra     modula7

modula70 movff   AccValue,TempH
        return

CompYear movfw   YearHi
        subwf   TempYH,w
        skpz
        return

        movfw   YearLw
        subwf   TempYL,w
        return

IsLeapYr btfsc   TempYL,0
        bra     NotLeap
        btfsc   TempYL,1
        bra     NotLeap
        setz
        return

NotLeap  clrz
        return

IncTemp  incfsz  TempYL
        return
        incf    TempYH
        return

BCDtoBin clrf    Htemp
        clrf    Ltemp
        clrf    Lbyte
        clrf    Hbyte

        swapf   TempA,w
        call    Mpy10

        movfw   TempA
        call    Mpy10

        swapf   TempB,w
        call    Mpy10

        movfw   TempB
        andlw   0x0f

        addwf   Lbyte
        skpnc
        incf    Hbyte
        return

Mpy10    andlw   0x0f
        addwf   Lbyte
        skpnc
        incf    Hbyte

        clrc
        rlcf    Lbyte,w
        movwf   Ltemp
        rlcf    Hbyte,w
        movwf   Htemp

        clrc
        rlcf    Lbyte
        rlcf    Hbyte

        clrc
        rlcf    Lbyte
        rlcf    Hbyte

        clrc
        rlcf    Lbyte
        rlcf    Hbyte

        movfw   Ltemp
        addwf   Lbyte
        movfw   Htemp
        addwf   Hbyte
        return

 org   0x1a00

mnth_val addwf   pcl

        retlw   .0           ;filler
        retlw   .0
        retlw   .3
        retlw   .3
        retlw   .6
        retlw   .1
        retlw   .4
        retlw   .6
        retlw   .2
        retlw   .5
        retlw   .0
        retlw   .3
        retlw   .5

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2004\07\02@053619 by Peter L. Peres

picon face
part 1 276 bytes content-type:TEXT/PLAIN; charset=US-ASCII
The attached pdf illustrates the problem of 'just using pullups' wrt.
leakage current. The capcitor Jinx wants to use may do the trick.

Peter

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part 2 3277 bytes content-type:APPLICATION/PDF; name="scl.pdf" (decode)

2004\07\02@055735 by Jinx

face picon face
> The attached pdf illustrates the problem of 'just using pullups' wrt.
> leakage current. The capcitor Jinx wants to use may do the trick.
>
> Peter

Thank you for taking the time to do that Peter

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2004\07\02@100415 by David VanHorn

flavicon
face
At 09:58 PM 7/2/2004 +1200, Jinx wrote:

>> The attached pdf illustrates the problem of 'just using pullups' wrt.
>> leakage current. The capcitor Jinx wants to use may do the trick.
>>
>> Peter
>
>Thank you for taking the time to do that Peter

Sometimes, protection diodes are a PITA! :)

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2004\07\02@141044 by Robert Rolf

picon face
"Peter L. Peres" wrote:
>
> The attached pdf illustrates the problem of 'just using pullups' wrt.

Of -course- there is leakage current through the unpowered device.
In fact the bulk diode is trying to power the whole unpowered
system so it will be pulling hard against  the entire Vdd load,
not just leakage. That is the reason you have to disconnect the
unpowered side of the bus even though it is open drain.

I have a kluged system with two different power sources, and the
SPI data and clock lines are able to power the PIC side
unintentionally through the bulk diodes. Fortunately the PIC side
only needs milliamp or so so no harm done (but it's getting redesigned).

> leakage current. The capcitor Jinx wants to use may do the trick.

As currently proposed, I don't see how that will help anything.
Please explain.

If anything the capacitor will make the I2C bus see a
transient low as the cap keeps the 4066 turned on while
PIC VCC dies since the cap will only be discharged through the
10k pullup (now pulldown) since the 4066 gate has 10^^12 ohms
input resistance.
This R/C  tau will be significantly longer than the power Vdd
drop if nF are used.

If one wants to use Jinx's design for delayed gate turn on,
they should add a reverse biased diode to PIC Vdd so
that the cap gets quickly discharged when Vdd drops.

This also illustrates why one should have pullups or pulldowns
on ALL PIC pins to keep your circuit safe while the PIC
initializes it's ports with the correct levels and direction
(always set levels BEFORE enabling outputs).

Better yet, use your LVD (or /MCLR) reset line so that the 4066
gate is disabled before PIC Vdd completely fails. There is usually
enough Vcc capacitance to hold up the rail for a few milliseconds
as power fails.

Systems where power fail detect is important use an isolation
diode on the input supply so a power fail detect device can
pull an interrupt low (high) well before Vdd even moves,
giving the processor time to shut down safely.
By sensing power fail BEFORE the regulator, you gain many
10s of ms to do your shut down housekeeping. An opto driven by
the raw input supply (battery or bridge) can provide
detection of input power loss while the power supply capacitors
keep the rail up long enough for a graceful shutdown.

Have fun working out the kinks...
Robert

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2004\07\02@222157 by Jinx

face picon face
> Have fun working out the kinks...

I'll try not to ;-)

I've mailed an enquiry to Philips, see what their take is

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2004\07\03@123055 by Peter L. Peres

picon face
> Sometimes, protection diodes are a PITA! :)

The 'protection diodes' figured in my drawing are in fact the inherent
bulk reverse diodes in the CMOS output transistors. And there is no way to
buy cmos chips that haven't got them. Had the circuits been open drain
(which the pic isn't) then the problem would have been inexistent. But the
PIC has only one open drain pin per chip afaik. Unfortunately the low Vil
for I2C precludes the use of shottky diodes between the controller and the
slave. Afair I2C wants 0.9V Vil (why so low when this destroys noise
immunity ?).

Peter

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2004\07\03@125207 by Peter L. Peres

picon face
>> leakage current. The capcitor Jinx wants to use may do the trick.
>
>As currently proposed, I don't see how that will help anything.
>Please explain.

The key is to understand what could generate a I2C start condition when
the PIC power goes down. This is unrelated to the pullup leakage problem.

In I2C the start condition happens if SDA makes a H->L transition when SCL
is high. If the PIC does this just while its Vcc goes down then the clock
chip will remain in the I2C start condition for the entire time the PIC
will be unpowered. Acc. datasheet it will then draw 200uA instead of 5 uA
(afair). So we want to avoid this at all costs.

One way is to add a capacitor that loads SDA. Then if the power goes down,
the SDA node will go low slower than the SCL node, and the start condition
will not be issued.

I do not believe that using a 4066 will ease matters. I think that the PIC
and the clock chip should be connected directly, with pullups fed from the
PIC side, and a small capacitor on the SDA line (say 30pF). Another option
would be to make the pullups different, with the SDA one larger, and rely
on bus capacitance. Obviously this needs to be tried out thousands of
times.

I believe that the PCF part will not have the upper bulk diode and PMOS
transistor, since it is open drain (I2C is open drain coupled). This would
solve the leakage problem. Also SDA and SCL should be pulled low when the
PIC psu is in 'limbo' to avoid them being in the forbidden voltage area.
This I would do by adding a pulldown 1meg on each.

Peter

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2004\07\03@191145 by Jinx

face picon face
> I do not believe that using a 4066 will ease matters. I think that
> the PIC and the clock chip should be connected directly, with
> pullups fed from the PIC side

But that still leaves SDA/SCL connected to "dead" PIC pins ?

> I believe that the PCF part will not have the upper bulk diode and
> PMOS transistor, since it is open drain (I2C is open drain coupled

http://www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf

Figs 41, 42, 43

The I2C spec is primarily concerned with dynamic systems and the
problem I've encountered is possibly unique to RTCs because they
must remain functional whatever happens in the rest of the circuit

http://www.semiconductors.philips.com/buses/i2c/products/index.html

Complete loss of power to a circuit with any of those devices, apart
from RTCs, does not matter. I don't think there are I2C SRAMs

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2004\07\06@170924 by Jinx

face picon face
I'm getting really fed up with

(a) people who don't read the question
(b) those people being support staff

{Original Message removed}

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